Post-CMOS Integration of MEMS Inertial Sensors Using Oxidized Porous Silicon Technique
Here we demonstrate a low-cost and CMOS compatible production method to fabricate CMOS-MEMS inetial sensors. A thick oxidized prous silicon (OPS) layer is selectively grown on the silicon substate before the standard CMOS processes for dielectric isolation and thermal isolation. The OPS techique has a substantial cost advantage over DRIE techniqe and can produce very thick layers without severe stress problems.
Lowly-doped p-type wafers (20-40 Ωcm, 500 μm-thick,  -oriented and polished) were used in our experiments. The whole process includes three main steps: formation of OPS layers, CMOS sturctures fabrication, and the MEMS structures fabrication.
To create thick porous silicon layer, ohmic contact was achieved by sputtering an 800 nm-thick Al film on the backside of samples. The electrolytes used for anodization contained 48 wt.% aqueous HF and DMF. Galvanostatic current densities of 500 mAcm-2 were applied from an Agilent power source with a tolerance up to 60 V. Macropore arrays with depth of about 48 μm were obtained, followed by an optimized oxidation process to form OPS layers. After that, standard CMOS process steps were used to produce electronic components. Finally, the MEMS structures are completely built on top of the finished CMOS substrate by partely removing the OPS layers, leaving the CMOS layers unthouched.
Figure 1 show SEM pictures of the cantilever beam-mass structure (Figure 1a) and comb structure (Figure 1b) released by removing the OPS layer. Figure 1c shows the MEMS inertial stuctures and CMOS electronic components obtained on the same chip. This represents an effective method to integrate MEMS sensors with electronic circuits.
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