1423
(Invited) The Stability of High Voltage AlGaN/GaN HEMTs
The enhancement mode (E-mode) operation is strongly preferred for low power consumption, driver circuit simplicity, and fail-safe requirements for power electronic circuits. For AlGaN/GaN HEMTs realized utilizing epitaxial layers on the gallium face, the piezoelectric polarization, together with the spontaneous polarization, greatly enhances the 2DEG concentration, which is beneficial for reducing the on-resistance. But this makes it difficult to achieve the E-mode operation since the 2DEG under the gate region must vanish at zero gate bias. Several approaches have been proposed, including the recess gate structure, fluoride plasma treatment, the nano-ribbon channel, the p-GaN gate, and others.
Although AlGaN/GaN HEMTs have demonstrated excellent performance with E-mode operation, their stability and reliability remains to be inspected before they can be commercialized. With different approaches to realize E-mode, the gate related stability problems arise differently depending on the gate design. In this work, we systematically investigate the stability of different device structures under different gate bias conditions, including Schottky gate HEMTs, p-GaN gate HEMTs, recessed MIS gate HEMTs, and multi-layer fluorinated MIS gate HEMTs. Figure 1 shows the pulsed Id-Vg characteristics of a recessed MIS gate AlGaN/GaN HEMT on a silicon substrate. The gate insulator is a 30 nm ALD deposited Al2O3 layer. The gate length is 3 μm and the gate-to-drain spacing is 20 μm for >1kV breakdown voltage. The pulse width is 5 ms and the period is 100 ms for all cases. The base voltage was varied from -15 V to 15 V and the drain current was measured during the pulse duration as shown in the inset. The threshold voltage Vth, which is defined when Id is 1mA/mm, increases with the base voltage, implying that negative charges are trapped in the gate insulator during the base duration. Figure 2 summarizes the extracted Vth for different gate structures using pulsed Id-Vg measurement with different gate base voltages. The Schottky gate HEMT shows a very stable Vth and Id-Vd characteristics against different pulse conditions but the negative Vth makes them less favorable. The p-GaN gate HEMT exhibits a positive but unstable Vth. The Vth shift can be as large as 1 V. Further annealing at 550oC in an O2ambient improves the p-type contact and hence the stability of the Vth but still limits the maximum gate voltage to 3 V. The decrease in Vth with increased gate base voltages implies trapping of holes in the p-GaN gate, which differs from the MIS gate device [2]. The MIS gate HEMT shows a positive threshold voltage about 6 V and a relatively large gate voltage swing. But the variation in the threshold voltage even at low gate base voltages indicates the occurrences of trapped charges in the gate insulator, which requires further examination and process improvement. More detailed discussion and measurement results will be shown.
Acknowledgement
This project was funded in part by financial support from Ministry of Economic Affairs 103A0002J9.
Reference
[1] T. P. Chow, R. Tyagi, IEEE Trans. Electron Devices 41(1994) 1481.
[2] T.-F. Chang et al. to appear in IEEE Trans. Electron Devices.