Monday, 30 May 2016: 08:40
Indigo 206 (Hilton San Diego Bayfront)
CMOS scaling has served the semiconductor industry and transformed the world exceedingly successfully over the past several decades. In recent times, the transition to hi-K dielectric interfaces enabled CMOS to shrink circuits to below the 32nm node. The advent of fully depleted devices (FDSOI, FINFETs) have enabled CMOS scaling to the limits of conventional 193nm optical immersion lithography.
Over the past decade, CMOS scaling has transformed mobile technologies. The cell phone and smartphone have become ubiquitous as increased performance has been garnered to increase functionality on the form factor at constant power (Watt regime). The resulting boom in data has transformed industries and fueled the social network and the "app" world. 14nm FINFET technology is now available on cutting edge mobile devices. The 10nm node will see various incarnations across the major semiconductor fabricators. The pressure on density to reduce cost will result in the adoption of multiple patterning techniques for the FIN, Gate and various MIddle Of Line (MOL) and Back End Of Line (BEOL) wiring levels. The need to reduce doping in the FINFETs will result in Multi-Workfunction-Gates. Novel materials will be needed to reduce parasitic capacitance and resistance in the MOL and BEOL levels. Some incarnations of the 10nm node will be called "7nm", but the true "7nm" node circuit densities will require the next generation of lithography -- Extreme Ultra Violet (EUV) at 13.6nm wavelength. The key to adoption in the commodotized mobile space is thus the cost of the chip which is challenged by the need for novel cost intensive patterning techniques and new materials.
While power and form factor are key to the mobile world, Server applications have required performance at much higher power (100+ Watt regime). CMOS scaling has served this market very well over the decades as improved transitors have always been utilized for increased performance (high end servers run > 5 GHz). The growth in the server market has migrated to large datacenters for cloud applications and away from standard transaction processing (which still remains important in many areas). Parasitic components on FINFETs are thus much more critical in this market and has thus driven early adoption of "next generation" materials and processes. The adoption of 10nm and 7nm nodes in this space will be determined less by cost than by ability to get better performance at constant chip power given the increased parasitics in the MOL and BEOL. This drives the need for introduction of new novel materials for improved performance and reliability.
Over the past decade, CMOS scaling has transformed mobile technologies. The cell phone and smartphone have become ubiquitous as increased performance has been garnered to increase functionality on the form factor at constant power (Watt regime). The resulting boom in data has transformed industries and fueled the social network and the "app" world. 14nm FINFET technology is now available on cutting edge mobile devices. The 10nm node will see various incarnations across the major semiconductor fabricators. The pressure on density to reduce cost will result in the adoption of multiple patterning techniques for the FIN, Gate and various MIddle Of Line (MOL) and Back End Of Line (BEOL) wiring levels. The need to reduce doping in the FINFETs will result in Multi-Workfunction-Gates. Novel materials will be needed to reduce parasitic capacitance and resistance in the MOL and BEOL levels. Some incarnations of the 10nm node will be called "7nm", but the true "7nm" node circuit densities will require the next generation of lithography -- Extreme Ultra Violet (EUV) at 13.6nm wavelength. The key to adoption in the commodotized mobile space is thus the cost of the chip which is challenged by the need for novel cost intensive patterning techniques and new materials.
While power and form factor are key to the mobile world, Server applications have required performance at much higher power (100+ Watt regime). CMOS scaling has served this market very well over the decades as improved transitors have always been utilized for increased performance (high end servers run > 5 GHz). The growth in the server market has migrated to large datacenters for cloud applications and away from standard transaction processing (which still remains important in many areas). Parasitic components on FINFETs are thus much more critical in this market and has thus driven early adoption of "next generation" materials and processes. The adoption of 10nm and 7nm nodes in this space will be determined less by cost than by ability to get better performance at constant chip power given the increased parasitics in the MOL and BEOL. This drives the need for introduction of new novel materials for improved performance and reliability.