Tuesday, 15 October 2019: 11:20
Room 212 (The Hilton Atlanta)
We demonstrate a versatile and programmable route to mask, with nanoscale precision, the surface of semiconductor nanostructures in an entirely bottom-up fashion. This capability promises to dramatically increase the manufacturing rate of high performance (i.e., > GHz, < 1 V) semiconductor devices for large-area, flexible electronics. Our approach – Selective CoAxial Lithography via Etching of Surfaces (SCALES) – involves three main steps: (1) Bottom-up synthesis of single crystalline semiconductor nanowires with an axially-encoded composition profile, (2) blanket surface-initiated polymerization of a masking material, and (3) selective removal of the masking material only from regions whose underlying surface is susceptible to an etchant. We show, among other examples, the selective patterning of dopant-modulated Si nanowires with a polymethylmethacrylate (PMMA) mask by leveraging the dependence of KOH etch rate on doping level. We will describe the role of polymerization parameters and post-polymerization etching on the patterning process with a suite of spectroscopy and microscopy techniques. Nanoscale masks produced via the SCALES process can subsequently direct the deposition of the oxides and metals needed to construct complete, fully-functional devices.
