As the CMOS scaling driven by the Moore’s Law approaching the fundamental limits, high energy consumption and heat dissipation have been recognized as the most critical device challenges. Novel switching devices with significantly lower power based on unconventional mechanisms have been explored to replace CMOS in various research programs, e.g., Nanoelectronics Research Initiative (NRI). The major categories of these devices include steep-slope transistors, spintronic devices, ferroelectric devices, and van der Waals devices [1]. These devices are often implemented on emerging materials with unique properties. As the foundation of nanoelectronic devices and systems, novel materials (including dielectrics) present both great challenges and promising opportunities. For example, dielectric layers for gating and electrical insulation are critical for low-dimension devices; magnetic insulators are promising for low-power high-efficiency spintronic devices; ferroelectric materials have been utilized to realize “negative-capacitance” transistors with steep subthreshold slope. Despite abundant scientific breakthroughs achieved on these emerging devices, comprehensive benchmarking has revealed that most of them do not outperform CMOS for Boolean logic and von Neumann architectures [2]. Therefore, the focus of emerging materials and devices has increasingly shifted toward novel computing paradigms.

Novel computing paradigms beyond Boolean logic and von Neumann architectures may provide solutions for energy-efficient computing. For example, in-memory computing reduces data movement between computing and memory units, and exploits the intrinsic parallelism in memory arrays. Neural-inspired computing implements cognitive and intelligent functions through a wide range of approaches, e.g., deep neural network, spiking neural network, hyperdimensional computing, probabilistic network, dynamic systems, etc. Although many of these approaches can be implemented in CMOS technologies, more efficient solutions may originate from the engineering and optimization of materials and devices that could enable native implementations of novel computing paradigms. For example, ferroelectric materials, binary and complex oxides, and chalcogenides have been utilized in a wide range of nonvolatile memories and analog devices, which may enable highly efficient in-memory computing and analog computing solutions. At the same time, stringent requirements exist for emerging devices to significantly outperform CMOS in novel computing paradigms, e.g., high density, fast speed, low power, high endurance, long retention, wide analog tunability, asymmetry, etc. [3] Specific requirements vary from application to application. Therefore, device-architecture co-design and co-optimization are important to address these requirements. A holistic approach from basic material exploration to device engineering and further up to architecture co-design has been adopted in more recent research programs, e.g., Energy-Efficient Computing from Devices to Architectures (E2CDA) [4].

This presentation will review the opportunities and challenges of emerging materials and devices for energy-efficient nanoelectronics, and highlight the approaches and perspectives of the E2CDA program.

References:

1. K. Bernstein, R.K. Cavin, W. Porod, A. Seabaugh, and J. Welser, “Device and architecture outlook for beyond CMOS switches,” IEEE Proc. 98(12), 2169-2184 (2010).
2. C. Pan and A. Naeemi, “Non-Boolean computing benchmarking for beyond-CMOS devices based on cellular neural network,” IEEE J. Explor. Solid-State Comp. Dev. & Circ 2, 36-43 (2016).
3. G.W. Burr, et al, “Neuromorphic computing using non-volatile memory,” Advances in Physics: X, 2(1), 89-124 (2017).
4. A. Chen, “New directions of nanoelectronics research for computing,” 14th IEEE ICSICT (2018).