State of the art manufacturing of microelectronics involves the electrodeposition of copper for fabricating on-chip interconnects, through-silicon-vias for chip stacking, and high density printed circuit boards. This lecture will present a selection of highlights related to superconformal electrodeposition of Cu ranging from its history to its impact on processing of microelectronic circuitry and, more generally, the understanding of additive effects in electrodeposition. The story begins in the mid-20^th century with the formal discovery of the effectiveness of plating additives in yielding smooth surfaces i.e. brighteners and levelers, before pivoting to the IBM paradigm changing introduction of complex 3-D Damascene Cu superfilling for on-chip interconnects in 1997. The role of electroanalytical, metallurgical, and surface science measurements along with insights, and modeling to develop a mechanistic understanding of morphological and microstructural evolution during trench and via filling will be detailed. The lessons learned and their extension to other chemical systems and applications will be discussed along with the challenges that lie ahead.