1465
Effect of Rising Edge in Dynamic Stress with Various Duty Ratio in Amorphous Ingazno Thin Film Transistor

Wednesday, 27 May 2015: 09:30
Conference Room 4C (Hilton Chicago)
Y. H. Lee, S. J. Seok (POSTECH), B. K. Kim, S. H. Kim, T. K. Lee (LG Display), and O. Kim (POSTECH)
Recently, many research explains the positive threshold voltage (Vth) shift of oxide TFT as charge trapping at gate dielectric or interface of gate dielectric and channel layer. But mechanism of degradation of rising edge of dynamic stress has not been explained exactly.

 During all stresses, gate stress of 1 Hz with 50%, 20%, 10% and 1% duty ratio was applied at 120 ℃ and both drain voltage and source voltage were grounded. Gate voltage (VG) was on-voltage (Von) of 20 V and off-voltage (Voff) of 0 V in unipolar positive stress, Von of 0 V and Voff of -20 V in unipolar negative stress, and Von of 20 V and Voff of -20 V in bipolar stress (Fig.1). During illumination, samples were illuminated using a top LED. We defined Vth as gate voltage at 1 nA of drain current ID at VDS of 15V. We defined effective time as sum of Vontime in all stress including illumination

 Fig. 2 shows the ΔVth as function of time with 50%, 20% 10% and 1% duty ratio. In dark, positive unipolar gate stress was applied in fig. 2(a) and bipolar gate stress was applied in fig. 2(b). In illumination, positive unipolar gate stress was applied in fig. 2(c) and bipolar gate stress was applied in fig. 2(d). Fig. 3 shows the ΔVth at effective time of 2000s as reciprocal function of duty ratio for positive unipolar gate stress and bipolar gate stress. At same effective stress time, ΔVth was increase with decreasing duty ratio and ΔVth was larger in bipolar gate stress than in unipolar positive gate stress. Fig. 4 shows ΔVth at effective time of 2000s as reciprocal function of duty ratio under positive unipolar gate stress for illumination and dark. In dark, higher ΔVth was observed compared with illumination.

 In this study, we investigated relationship of ΔVth with various bias stress condition including positive unipolar, negative unipolar and bipolar gate stress and ambient including dark and illumination. We will explain positive bias temperature stress based on charge trapping and introduce new mechanism of additional positive ΔVth on rising edge of dynamic stress.