Large Gate Swing and High Threshold Voltage Enhancement-Mode AlGaN/GaN HEMTs Using Low Energy Fluorine Ion Implantation in GaN Layer

Tuesday, 26 May 2015: 15:20
Conference Room 4C (Hilton Chicago)
C. H. Wu, P. C. Han (National Chiao Tung University), and E. Y. Chang (National Chiao-Tung University)
Gallium nitride (GaN)-based high electron mobility transistors (HEMTs) is a promising candidate for high power applications. For simplify circuits design and fail-safe operation, enhancement-modes (E-mode) operation is indispensable for GaN power application. From now on, several method has been demonstrated to fabricate E-mode HEMTs, such as recessed-gate [1], p-type GaN [2], fluorine plasma implantation [3]. Mostly group report the results of fluorine plasma implantation by using the RIE, ECR system [3-4]. However, those systems cannot avoid carbon contamination implanting into the AlGaN or GaN layer and well control the fluorine concentration during the implantation. Ion implanter has been widely used in CMOS foundry, which can provide the pure fluorine ions and well-controlled dose. Recently, it is suggested that fluorine concentration in GaN layer could be more efficient to shift the threshold voltage from negative to positive region than fluorine concentration in AlGaN layer [5]. In this work, we successfully fabricate E-mode AlGaN/GaN HEMTs with large gate swing and high threshold voltage by using fluorine ion implantation in GaN layer. The AlGaN/GaN HEMT heterostructure was grown by metal-organic chemical vapor deposition (MOCVD) on silicon substrate. The epitaxial structure consisted of 2-nm GaN cap layer, 25-nm Al0.23Ga0.77N barrier layer. The ohmic contact was formed by an alloyed Ti/Al/Ni/Au metal stack. The planar isolation was created by born ion implantation. After gate window was defined by lithography, fluorine ions were directly implanted in the gate region by Varian E500HP ion implanter. Ni/Au was deposited by electron beam evaporation as the gate metal. Finally, post–metallization annealing (PMA) was carried out at 400 °C for 10 minutes in N2 ambient to repair implant damage. D-mode devices follow the same process without fluorine ion implantation. The SRIM (The Stopping and Range of Ions in Matter) simulation were used in this work to simulate fluorine ion distribution in GaN HEMTs, as shown in Fig. 1[6]. Owing to limitation of implanter, fluorine implant energy is chosen for 10 keV, 12 keV, and 15 keV. With higher implant energy, deeper fluorine ion distribution in the GaN layer and higher fluorine ion centration are demonstrated. The higher fluorine ion concentration increase the larger positive shift of threshold voltage, but severe implant damage issue should be considered. The devices feature a gate length, a gate-drain spacing, gate-source spacing and gate width, 2 um 15 um, 3 um, 50 um, respectively. The ID-VGtransfer characteristics of devices are plotted in Fig 1. For E-mode HEMTs, threshold voltage are shifted from negative to positive region by fluorine ion implantation. It is proven that higher fluorine ion concentration in GaN layer lead to the larger positive shift of threshold voltage. However, the drain current degradation are observed in fluorine devices, especially, higher implant energy (15 keV). This is suggested that severe implant damage is probably exist in the channel region. Thermal stability test is shown in Fig. 3. The fluorine device was annealed at 400 °C for 10 minutes. This result confirms that the implant damage is not fully eliminated in 15 keV fluorine devices because the drain current increase are clearly observed. Compared with 15 keV fluorine devices, 12 keV fluorine devices reveal the good thermal stability in this work. Without gate insulator, E-mode HEMTs with 12 keV fluorine ion implantation show high threshold voltage of 2.5 V, a current density of 200 mA/mm at a gate bias 5.5 V. Low energy fluorine ion implantation in GaN layer could be an effective method to fabricate the enhancement-mode AlGaN/GaN HEMTs for high power applications.


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[2]   Y. Uemoto, et al. IEEE Transactions on Electron Devices, vol. 54, pp. 3393-3399, Dec. 2007

[3]    Y. Cai, et al. IEEE Electron Device Letters, vol. 26, pp. 435-437, Jul. 2005.

[4]    Yuhao Zhang, et al. Appl. Phys. Lett. 103, 033524, 2013.

[5]    S. Hamady, et al. 2013 15th European Conference onPower Electronics and Applications (EPE), pp. 1–6, 2013.

[6]    http://www.srim.org/