1184
(Invited) III-V / Si Integration for Photonics

Tuesday, 31 May 2016: 15:20
Indigo 206 (Hilton San Diego Bayfront)
J. P. Reithmaier and M. Benyoucef (University of Kassel)
In the last decade a large progress took place in the development of a Si-based fabrication technology platform for integrated photonics, however, mainly for passive devices, such as filters, waveguides, splitters and combiners. The integration of active devices remains very challenging. The talk will start with a brief review of different epitaxial approaches for III-V material growth on Si before a new approach will be presented, which may combine high Si process compatibility with full III-V material functionality.

Currently, active photonic devices on a silicon platform are obtained by bonding techniques, either on a single device chip or a full III-V wafer level. However, in this case the majority of III-V material is wasted by substrate removal. Direct epitaxy on silicon overcomes these problems but suffers in most cases from the lattice mismatch and the differences in expansion coefficients. This can be partially accommodated by thick relaxation layers and using quantum dot active regions to reduce the sensitivity against threading dislocations or using complex material compositions, like Ga(N,As,P), which allow lattice matching. However, the III-V layers have to be processed completely separate from the silicon.

A new approach based on III-V-Si nanocomposite is under development, which may overcome most of those problems. This approach is based on the growth of III-V quantum dots (QDs) directly on silicon. Based on a GaAs/InAs core-shell geometry high quality optical emission could be obtained. By overgrowing InAs QDs with silicon a defect free single crystal planar silicon layer can be formed with embedded InAs nano clusters. Transmission electron microscope investigations show that the nanoclusters fully relax by closed loop interface dislocations but without initiating threading dislocations in the silicon matrix.