169
A Simple Formula Describing Impedance Artifacts Due to the Size and Surface Resistance of a Reference-Electrode Wire in a Thin-Film Cell

Thursday, 17 May 2018: 09:20
Room 607 (Washington State Convention Center)
M. W. Verbrugge, D. R. Baker (General Motors, R&D Center), and X. X. Hou (General Motors Global Propulsion Systems)
Reference electrodes are used in testing and designing thin-film cells in order to distinguish the effects of the positive and negative electrodes and determine the sources of significant resistance (or impedance), but the reference electrode introduces some distortion into the measurement due to non-uniformity of the current distribution. This often arises due to edge effects, the size and placement of the reference electrode, or both. Two common geometries for placing reference electrodes are internally, between the cathode and anode, and externally at a distance from the cathode and anode. Each design introduces some level of distortion, which must be clarified. This work focusses on internally-placed wire reference electrodes and elucidates the artifacts in cell impedance measurements as a function of wire size and wire surface resistance. Published simulations of impedance artifacts rely on computationally-intensive computer simulations, but we develop a simple formula to accurately approximate these effects. The formula is derived using a singular perturbation approximation to the impedance and then combining it with a simple equivalent circuit. Some comparisons with detailed numerical simulations show the accuracy of the resulting formula as a function of the diameter of the reference wire and its surface resistance.