Parallel Programming of an Ionic Floating-Gate Memory Array for Scalable Neuromorphic Computing

Monday, 14 October 2019: 17:00
Room 210 (The Hilton Atlanta)
E. J. Fuller (Sandia National Labs), S. T. Keene, A. Melianas (Stanford University), Z. Wang (University of Massachusetts, Amherst), S. Agarwal (Sandia National Laboratories), Y. Li, Y. Tuchman (Stanford University), C. D. James (Sandia National Labs), M. J. Marinella (Sandia National Laboratories), A. Salleo (Stanford University), and A. A. Talin (Sandia National Laboratories)
Neuromorphic computers could overcome efficiency bottlenecks inherent to conventional computing through parallel programming and read out of artificial neural network weights in a crossbar memory array. However, selective and linear weight updates and <10nA read currents are required for learning that surpasses conventional computing efficiency. We introduce an ionic floating-gate memory array [1] based upon a polymer redox transistor connected to a volatile conductive-bridge memory (CBM). Selective and linear programming of a transistor array is executed in parallel by overcoming the bridging threshold of the CBMs. Synaptic weight readout with currents <10nA is achieved by diluting the conductive polymer in an insulating channel to decrease the conductance. The redox transistors endure > 109 ‘read-write’ operations and support > 1MHz ‘read-write’ frequencies.

[1] Fuller et. al. Science, 2019 (in press)