(Invited) Metal Oxide Thin-Film Transistors with Deep Submicron Channel Enabled By Self-Aligned Nano Gap Patterning

Tuesday, 11 October 2022: 10:40
Room 214 (The Hilton Atlanta)
S. H. Cho, C. Sung, and S. Nam (Electronics and Telecommunications Research Institute)
We demonstrate the fabrication technology of metal oxide semiconductor thin-film transistors (TFTs) with deep submicron channel length and their electrical characterization. We call the method as self-aligned nano gap patterning (SANP), where the pattern resolution is limited not by optical diffraction in photolithography, but by the details in etching and deposition process. Therefore, this makes it enable to overcome the obstacle in the scale down of large area electronic devices, for which high resolution photolithography tools such as VUV or XUV used in semiconductor industry are almost useless due to the extremely low throughput and high cost. In this work, we employ the contact aligner with line and space resolution of 3 μm, and the oxides TFTs with 0.1μm channel length was successfully fabricated with field-effect mobility of 12 cm2/Vs, subthreshold swing of 100 mV/dec, Ion/Ioff of 1010, and turn-on voltage of -0.88 V.