Fabrication and Characterization of p-Type Thin-Film Transistors Using Sete Active Layer Deposited by Pulsed Laser Ablation

Tuesday, 11 October 2022: 08:30
Room 214 (The Hilton Atlanta)
K. Choi, S. Nam, H. Oh, J. Y. Oh, and S. H. Cho (Electronics and Telecommunications Research Institute)
We fabricated p-type thin-film transistors(TFTs) using SeTe films deposited by pulsed laser ablation at room temperature. The TFTs were thermally annealed at different temperatures (150°C, 200°C, 250°C) under oxygen ambient. It was found that the thermal annealing can improve the crystallinity and induce the surface oxidation of the SeTe films. This gave rise to enhancement the performance of the TFTs. As the annealing temperature increases, the field-effect mobility and the on/off current ratio was increased and the off-state current was decreased. The 250°C-annealed TFT shows the best performance with a high filed effect mobility of 3.5cm2/Vs and a high on-off current ratio of 1X105. We also successfully demonstrated a CMOS inverter with the p-SeTe and a n-ITZO TFT. The CMOS inverter exhibits a gain of ~12 at a transition voltage of ~0.8V under a supply voltage of 5V.
See more of: H02 - P-channel and Organic TFTs
See more of: H02: Thin Film Transistors 16 (TFT 16)
See more of: Electronic and Photonic Devices and Systems
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