Tuesday, 11 October 2022: 16:20
Room 213 (The Hilton Atlanta)
As the demand for SiC based devices continues to grow, there is an aggressive push to drive down sources of yield loss and device failures. One route to mitigate this issue is via connection of device yield loss to defects in the bare substrate material. Here, high throughput X-ray topography in conjunction with KOH etching and photoluminescence imaging were utilized to detect and classify various substrate dislocations. Subsequent epitaxial layers, grown on the substrates from various vendors, were analyzed using a confocal microscope to determine which substrate defects propagated into the epi. Data indicates that there is a good correlation between substrate BPDs nucleating into epitaxial stacking faults. This is supported by data from hundreds of different boules demonstrating that there is a relationship between the number of BPDs in the substrate and the number of partials and stacking faults detected in the resultant epitaxial layer. BPDs are not the only substrate dislocation nucleation source as the data also suggests other parallel sources are involved. Thousands of MOSFET and Diode devices were analyzed to understand the influence that substrate defects, propagated to the epitaxial layers, have on device leakage and yield loss. It was determined that MOSFET devices are more sensitive to the stacking faults that nucleate from the substrate dislocations compared to Diodes. While most of the stacking faults and other dislocations that occur in the epi layers do not independently result in device failures or leakage, an increase in the density of these defects within a die, can lead to increased leakage and decreased device performance. The inherent variability of these relationships requires the analysis of very large numbers of wafers to see the clear trends. This work uses a combination of X-ray and photoluminescence detection techniques to trace dislocations in substrates that nucleate into epitaxy layers and result in device leakage and failure over hundreds of wafers and thousands of devices. This correlation between device characteristics and crystal dislocations provides necessary information in determining which defects are most necessary to reduce or eliminate to improve device yield and performance.