Investigating Gate Interface Traps in β-Ga2O3 Field Effect Transistors (MOSFETs) By Using the Transfer Length Method (TLM) and UV Exposure

Tuesday, 11 October 2022
O. Maimon (George Mason University, National Institute of Standards and Technology), N. Moser, K. Liddy, A. Green, K. Chabak (Air Force Research Laboratory), C. Richter (NIST), K. Cheung, S. Pookpanratana (National Institute of Standards and Technology), and Q. Li (George Mason University, National Institute of Standards and Technology)
Beta-gallium oxide (β-Ga2O3) is a promising ultra-wide bandgap semiconductor for high power electronic applications due to its high theoretical critical field of 8 MV/cm, and Baliga figure of merit (BFOM) of ~3300, 3 – 10 times larger than current state-of-the-art wide bandgap semiconductors. β-Ga2O3 field-effect transistors (FETs) have been explored for both high power and radio frequency (RF) operation, but with relatively high parasitic resistances. A method is developed to determine the contact, series, and channel resistances in depletion mode β-Ga23 MOSFETs. The Al23-β-Ga2O3 interface is primarily important in the performance of β-Ga23 FETs due to charge trapping. Measurements will be performed with UV and visible light radiation to study the role of trap states on the FET resistances and device performance.

Here, we report on using a modified transfer length method (TLM) to determine the contact, series, and channel resistances from planar, depletion-mode β-Ga2O3 FETs. The results are compared with respect to conventional TLM structures fabricated on the same wafer. The β-Ga2O3 FETs and TLM structures are fabricated on a (010) semi-insulating β-Ga2O3 substrate. The channel layer is a 50 nm Si-doped epi-layer with a target concentration of 2.4 x 1018 cm-3. A Ti/Al/Ni/Au metal stack is deposited and annealed to form Ohmic contacts. The gate dielectric is composed of atomic layer deposition-grown aluminum oxide (Al2O3, 20 nm). The structures have a constant gate length, LG, of 1.94 μm, while the total source-drain spacing, LSD, varies as 3μm, 8 μm, and 13 μm. Transfer characteristics were measured at room temperature and low drain-source voltage, VDS, of 0.01 V. The threshold voltage, VTH, was determined to be » -4V for all MOSFET devices. Measurements were performed in the dark or under UV (265 nm, 2.8 W/cm2) exposure.

Conventional TLM structures were measured in the dark and with UV exposure, and a 40% decrease in the sheet resistance was observed when exposed to UV. We attribute this change to an increase in the carrier concentration from photo-generated electrons due to trap states within the β-Ga2O3. We also performed I-V measurements of the FETs in the dark and observed hysteresis behavior with respect to gate-source voltage, VGS, which we attribute to trapped charge at the Al2O3-β-Ga2O3 interface. Using the TLM method, we developed a methodology to extract the β-Ga2O3 MOSFET channel sheet resistances within the gated (Rsh,G) and ungated (Rsh) regions as a function of VGS. We observe a significant decrease in Rsh,G from 288 ± 14 kΩ sq-1 to 7.6 ± 0.38 kΩ sq-1 as VGS varies from -3 V to 3 V. The sheet resistance in the ungated regions, Rsh­, shows a negligible change from 28 ± 1.4 kΩ sq-1 above a VGS of -1.8 V, comparable to that of the conventional TLM structures, but begins to increase with more negative V­GS, reaching 90 ± 4.5 kΩ sq-1 at a VGS of -3 V. The VGS dependence of Rsh­ is due to complicated current flow mechanisms when the depletion region is large, which is not considered in this model. We will extend the study by performing I-V measurements with UV and visible light radiation to observe any effect of traps at the Al2O3-β-Ga2O3 interface has on Rsh and Rsh,G.