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Effects of Barrier Layer Thinning and Pore Opening on Nanowire Growth in Nanoporous Aluminum Oxide Templates
Effects of Barrier Layer Thinning and Pore Opening on Nanowire Growth in Nanoporous Aluminum Oxide Templates
Tuesday, May 13, 2014: 17:00
Nassau, Ground Level (Hilton Orlando Bonnet Creek)
Nanowires have garnered much interest in recent years for their potential in increasing performance of devices, such as solar cells, thermoelectrics, batteries, and piezoelectrics. Many methods exist for the fabrication of nanowires, but one of the most promising methods is the use of nanoporous aluminum oxide templates due to its extremely high density and self-ordering through a hexagonal close packed structure. However, fabricating uniform arrays of nanowires in contact with a conductive substrate still remains a challenge. A vital step in the process is removal of the barrier layer between the pore and the underlying substrate. This step is needed to establish direct contact from the pores to the substrate. The objective is to remove the barrier without sacrificing the pore walls. Several methods exist for barrier layer thinning, including stepping down the anodization voltage or ramping down the applied current. However, the thinning method will influence the outcome of the pore opening, which is the second and final step in creating direct contact between the pore and substrate. Here, different barrier layer thinning techniques will be discussed and their effect on the pore opening process examined. Both step-down voltage and ramped current methods were used to understand the barrier layer thinning process. These results were correlated to the amount of pore opening achieved, measured through a combination of electrochemical impedance spectroscopy and chronoamperometry. Finally, nanowires were grown within these aluminum oxide templates to study the effects of different barrier layer thinning and pore opening techniques on nanowire growth and uniformity. This research provides a comprehensive approach towards fabricating uniform, high-density nanowire arrays.