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Controllable Phosphorus Doped Graphene Field Effect Transistor Using Phosphosilicate-Glass Films
In this paper, Chemical n-type doping process of graphene using solid phase diffusion method of PSG (phosphosilicate glass) film is demonstrated. Figure 1 shows the doping process flow the graphene field effect transistor. PSG films were grown by CVD(Chemical vapor deposition) method on highly doped silicon wafer. In order to activate the dopants of the PSG films were annealed from 700°C to 900°C at intervals of 100(pre-annealing). The as-grown graphene layers were transferred on CVD grown 300 nm thick PSG film on heavily p-type Silicon substrate by a wet transfer technique. Dopants were diffused by annealing process to graphene on PSG films from 300°C to 500°C at intervals of 100°C. (post-annealing)
Both pristine and annealed graphene films were analyzed by raman and XPS(X-ray photoelectron spectroscopy). For electrical characterization, drain current-gate voltage(ID-VG) and drain–source voltage (VDS) bias of 1 V was applied to the FETs when measuring the ID–VG characteristic. Figure 2 shows the survey XPS spectrum of doped graphene samples. The atomic percentage of P in doped graphene increasing according to annealing temperature of the samples. According to these results, dopants were diffused on the surface of graphene. Figure 3 shows ID-VG characteristics of the FETs formed on the different graphene layers. Dirac point of the pristine graphene FET was observed at around +50 V since the pristine graphene generally serves as a p-type material in air because of unexpected impurity problems. However, Dirac points were respectively shifted from 21.5V to 0.5V after annealing treatment process, indicating that this n-type doping method using PSG annealed process successfully.
We developed graphene doping process with solid phase diffusion of PSG film which allows the control of Dirac point in graphene. The feasibility of the n-doping process for graphene-based electronic devices was successfully demonstrated in this paper by fabricating a MOS capacitor with n-channel FETs on annealed graphene. It is believed that can be expand the application, not only channel doping, but also reducing the contact resistance.