High-Voltage, High-Frequency Electrochemical Capacitor
EDLC cells, like battery cells, operate at low voltage. Thus cells must be series connected to operate at high-voltage. Figure 1 shows an approach devised for interconnecting the EDLC cells to create a high-voltage, high-frequency EDLC. It involves interconnecting planar EDLC cells using the substrate metallization. As shown, interdigitated gaps are created in the VOGN that has been grown on a thin metal layer covering an insulating substrate, for instance, nickel on alumina. The gap is created using a laser to cut through the VOGN and metal down to the insulating substrate. This then creates multiple electrically-isolated regions (six are shown in the figure). Two adjacent regions become a single EDLC after electrolyte is applied over the gap and the surface of that region. To make a series connection of cells, each gap must be individually covered with an electrolyte, making sure that the electrolyte band does not touch the neighboring bands. This is a “bipolar” design in two dimensions, the substrate metallization serving as the bipolar plate.
Connecting M cells in series each rated at voltage Vo with capacitance Co and series resistance Ro yields a capacitor with a voltage rating M·Vo, capacitance Co/M, and series resistance M·Ro. The frequency response of this high-voltage capacitor is nearly identical to that of one of its cells because the interconnects add minimal resistance. Voltage-balance resistors can be added using, for instance, thick-film printing processes. Details of the fabrication process are described and electrical performance data on these high-voltage, high-frequency electric double layer capacitors is presented.
1J.R. Miller el al, “Graphene Double-Layer Capacitor with ac Line-Filtering Performance”, Science 329, 1637 (2010).
2Cai M, Outlaw RA, Butler SM, and Miller JR, “A High Density of Vertically-Oriented Graphenes for Use in Electric Double Layer Capacitors”, Carbon 50, 5481–5488 (2012).