Charge Trapping Properties of Silicon Carbonitride Storage Layers for Nonvolatile Memories

Wednesday, 8 October 2014
Expo Center, 1st Floor, Center and Right Foyers (Moon Palace Resort)
K. Kobayashi, S. Naito, S. Tanaka, and Y. Ito (Tokai University)
Charge-trapping nonvolatile memories have received considerable attention as a promising candidate for the future data storages in communication and multimedia applications. In this architecture, electron and hole trapping phenomena by point defects distributed in charge trapping dielectric layers, such as silicon nitrides, are commonly used to memorize data. Recently, we have proposed the application of SiCN films with a low-dielectric constant (low-k) and a narrow band gap to the charge trapping layers [1]. The relative dielectric constant of SiCN films is 4.8-4.9, which is lower than that of silicon nitride films. Charges trapped in the low-k SiCN charge trapping layer induce the larger threshold voltage shift in MISFETs as compared with those trapped in the silicon nitride layer. In addition, the band gap of SiCN films is 3 to 4 eV, which is narrower than that of silicon nitride films (~5 eV). The narrower band gap of the charge trapping layer reduces the energy barrier for carrier injection into the layer. Thus, the low-k and narrow-band gap SiCN films would yield higher programming and erasing speeds and reduced power consumption. In the present study, we conducted a comparative study on charge trapping characteristics of the SiCN and silicon nitride films.

   Two types of film structures were fabricated on p-type (100) silicon substrates: (A) a SiOX-SiCN-SiO2 film and (B) a SiOX-SiNX-SiO2 film. In the both types of films, a tunnel oxide film of 2.4 nm in thickness was first formed using rapid thermal oxidation. A 31.5-nm-thick SiCN film with the relative dielectric constant of 4.8-4.9 was grown at 400 °C using a PECVD technique. A 30.4-nm-thick SiNX film was grown at 600 °C using a LPCVD technique. A blocking oxide film of 17.3 nm was grown using a PECVD technique. Finally, an aluminum film was deposited to form the gate electrode. After electrons or holes were injected into the charge trapping layers, the flat-band voltage shifts ΔVFBwere measured.

   Figure 1 shows the programming and erasing characteristics under the gate biases of +14.3 V and -15.1 V. The programming and erasing speeds in the SiOX-SiCN-SiO2 structure were obviously higher than those in the SiOX-SiNX-SiO2 structure. In the programming operation, the higher programming speed in the SiCN sample was mainly attributed to the low-dielectric constant of the SiCN film. In the erasing operation, the hole trapping speed in the SiCN sample was higher than that in the SiNX sample. The higher erasing speed in the SiCN sample arose from the higher hole trapping speed and the low-dielectric constant of the SiCN film. Figure 2 shows the retention characteristics of the SiOX-SiCN-SiO2 and SiOX-SiNX-SiO2 structures. The extrapolated 10-year memory window of the SiCN sample was wider than that of the SiNXsample. The SiCN films can be employed as the charge trapping layer of advanced nonvolatile memories.

References: [1] K. Kobayashi, S. Naito, S. Nakiri and Y. Ito, ECS Trans. 58(5) (2013) 81.