(Plenary) Extending the FETs: Challenges and Opportunities for New Materials and Structures

Monday, 6 October 2014: 10:35
Expo Center, 1st Floor, Universal 12 (Moon Palace Resort)
K. Uchida and T. Takahashi (Keio University)
Toward the end of CMOS technology roadmap, three-dimensional structure and new channel materials have been pursued and in recent years partly utilized in scaled FETs. Firstly, channel structures for FETs with channel length of less than 20nm will be discussed and challenges to realize the nanoscale three-dimensional structures will be addressed. In particular, trade-off between parasitic resistance and capacitance, low-frequency noise, and variability of three-dimensional structures will be shown. Then, the opportunites for new materials will be investigated. The importance of thermal management in nanoscale, new channel materials will be also discussed.