A Novel Backside Gate Structure to Improve Device Performance

Tuesday, 26 May 2015: 14:30
Conference Room 4C (Hilton Chicago)
Y. H. Hwang, W. Zhu, C. Dong, S. Ahn, F. Ren (University of Florida), I. Kravchenko (Oak Ridge National Laboratory), D. Smith (Arizona State University Department of Physics), and S. J. Pearton (University of Florida)
AlGaN/GaN HEMTs have gained more attention recently because of the superior mobility (~1400 cm2/V-s) and high breakdown voltage. However, the reported breakdown voltage (~2000V at Lds=40µm) was still below GaN limit. The reason might be due to surface traps, defects in GaN buffer layer, etc. Methods to improve breakdown voltage include acceptor doping in buffer layer, insulator passivation or field plate over dielectric passivation. In this paper, we propose a new structure, which opened a via through the substrate as a backside gate and a field plate, and demonstrate the improvement of device performance such as transport characteristics and breakdown voltage. 

The HEMT structures consisted of a 25 nm AlGaN barrier layer, a 0.8 µm C doped GaN buffer layer, a 1.4µm AlGaN transition layer and a thin AlN nucleation layer on 300µm Si substrate. HEMT fabrication began with Ti/Al/Ni/Au Ohmic metallization and rapid thermal annealing in N2 at 825ºC. Isolation was accomplished by use of multiple energy N+ implantations. After implantation, the devices were passivated with 70-nm-thick SiNx by PECVD at 300ºC. Gate definition was achieved by patterning the gate and selectively removing the SiNx layer. The contact windows to the Ohmic contact pads were also opened simultaneously as defining the gate. After SiNx etching, wider gate patterns and Ohmic contact pads were opened. Ni/Au-based gate metallization was deposited on the gate and Ohmic contact pads simultaneously. The devices were then passivated with another 400-nm SiNx layer at 300ºC. The contact windows were opened by dry etching. The LDS was 4 µm. The LG was 0.45 and WG was 100 µm, respectively. There was an additional metal deposition for source field plate (FP). It was connected to the source and extended by 1 µm out over the gate to the gate-to-drain region. Above process flows are our standard process flow for reference. For our new structure, to drill via holes on the backside of the devices, the wafers were first polished to 150µm. Photoresist AZ9260 were used to pattern the via holes on the backside of the samples and aligned to the front side by Aligner MJB3.  The high aspect ratio of the via holes were fabricated by BOSCH process. After forming via holes, Ti/Au was sputtered to form the backside gate (BG).

Figure 1 showed effect of backside voltage (VBG) to drain I-V characteristics. As shown in Figure 1, the drain saturation current decreased and the channel resistance became higher after applying VBG at -10 V. Also, the drain current at pinch off region get decreased. This is due to the introduction of another depletion region from the backside of the device. In other words, the BG provided an additional control of the device, which made the device more robust.

Figure 2 showed the transfer characteristics of device with and without applying VBG. As shown in Figure 2, both of the on current and off current became lower. Besides, the sub-threshold slope became steeper after applying -10 V at the BG, which meant better modulation of the device. Due to the better pinch off of the device, the breakdown voltage (VBD) was significantly improved.  Table 1 showed the summary of the effect of VBG. As shown in TABLE 1, although IDS was slightly decreased, but the more reduction of gate current improved on/off ratio for one order, sub-threshold swing from 204 to 137 mV/dec, and VBD for 40%. These improvements were all achieved because of the backside gate.

Besides applying VBG to improve VBD, the BG could be used as a FP, too. Studies have shown that FP can redistribute the electric field, and thus increase the VBD. In this study, we demonstrate the similar result. When connecting the BG to front-side gate, the VBD could be increased around 8 % as shown in Figure 3. When connecting the BG to front-side source, VBD didn’t have noticeable improvement. The reason that source FP didn’t have obvious effect in our study might be the existence of front-side FP. On the other hand, drain FP actually decrease the VBD. For drain FP, the backside FP was at positive bias. This positive bias along with the front-side positive bias would generate hot electrons and enhance the tunneling.  In summary, VBD could be improved by simply connecting the backside gate to front-side gate.

In conclusion, we demonstrate a new structure for AlGaN/GaN HEMT. This structure could improve the on/off ratio, sub-threshold swing, and breakdown voltage. It is worth to see if it could improve short channel effect, self-heating effect, or current collapse.