Negative Gate Transconductance in MIS Tunnel Diode Induced by Peripheral Minority Carrier Control Mechanism

Negative gate transconductance (NGT) has been demonstrated in various devices like gated resonant tunneling devices, modulation doped FETs, and gate/source overlapped heterojunction tunnel FETs, and has been used for ultra-high frequency filters, multi-level logics, and phase encoder applications. [1] In this work, NGT is also observed in a metal-insulator-semiconductor (MIS) tunnel diode.

     The current of an MIS tunnel diode is very sensitive to surrounding signals. Therefore, MIS tunnel diodes have been used as solar cells and sensing devices. It was found that the saturation current of the MIS tunnel diode is mainly flowing along the edge of the device due to the fringing field effect. [2] Also, it was found that the saturation current increases with oxide thickness. [3] It was believed that the saturation current is dominated by the Schottky diode reverse­­­-bias current, the thicker the oxide, the lower the effective Schottky barrier height, and therefore the current is larger.

     In previous studies [3], it was also observed that the saturation current of the MIS tunnel diode may increase with increasing light intensity or temperature. It was attributed to that the light or temperature would change the minority carriers distribution profile at the fringe of the device. The lateral diffusion current of minority carriers is therefore changed, which affects the effective Schottky barrier height and the current at device edge. In this work, the edge Schottky diode current of an MIS tunnel diode, Al/2.2 nm SiO₂/Si(p), controlled by the gate voltage of a nearby MIS tunnel gate capacitor (with the same structure as the MIS tunnel diode, but it functions as a gate capacitor with ultra-thin oxide) is demonstrated.

     Figure 1 shows the schematic diagrams of the fabricated MIS tunnel diode (the inner circle device) with an MIS tunnel gate capacitor (the ring device) nearby. Figure 2(a) shows the measured MIS tunnel diode saturation currents (I_D) versus the gate voltages of the MIS tunnel gate capacitor (V_G). NGT in I_D is observed. Note that the valley of the kink matches the flat-band region of the MIS tunnel gate capacitor. Figure 2(b) shows the TCAD simulation of the electron concentration at the gate edge, n_gap(x=0), versus V_G while V_D=3 V. Similar behavior to NGT is also observed, which evokes the correlation between the n_gap and I_D.

     Figure 3 shows the schematic diagrams of the mechanism of how V_G affects I_D. Note that larger gradient of n_gap at drain depletion region edge (x=S^*) leads to larger lateral diffusion flux of electrons, F_e-, which lowers the effective Schottky barrier height of holes, φ_h, at the edge of MIS tunnel diode, and increases I_D (≈I_h, the Schottky diode current of holes). In short, I_D increases with the gradient of n_gap(x=S^*). The gradient of n_gap(x=S^*) is changed as follows: (a) While V_G is in accumulation region, the gate electrons (n_inj) inject into the Si substrate due to the quantum tunneling effect, which increases the n_gap(x=0) and the gradient of n_gap. (b) While V_G is in flat-band region, the electron injection decreases due to the lower electric field, which decreases the n_gap(x=0) and the gradient of n_gap. (c) While V_G is in depletion region, the depletion region comes out and the inversion charge, n_inv, rises, which increases the gradient of n_gap. (d) While biasing V_G further positive, the electrons at the gap are attracted toward the gate by the substrate electric field at gate edge, ε_s,edge, and then the electrons tunnel to the gate metal, which decreases the n_gap(x=W_dep) and the gradient of n_gap. The NGT mechanism in I_Dis therefore concluded.

     This work was supported by the Ministry of Science and Technology of Taiwan, ROC, under Contract No. NSC 102-2221-E-002-183-MY3 and MOST 103-2622-E-002-031.

Figure Captions:

Figure 1. Schematic diagrams of the fabricated device structure.

Figure 2. (a) MIS tunnel diode saturation currents (I_D) versus the gate voltages of the MIS tunnel gate capacitor (V_G). (b) TCAD simulation of the electron concentration at the gate edge, n_gap(x=0), versus V_G while V_D=3 V.

Figure 3. Schematic diagrams of the mechanism of how V_G affects I_D (≈I_h), as V_G is in (a) accumulation, (b) flat-band, (c) depletion, and (d) deep depletion regions. The values of V_FB, V_G1, and V_G2are shown in Figure 2(a).

References:

[1]   A. R. Trivedi, K. Z. Ahmed, and S. Mukhopadhyay, IEEE Electron Device Lett., 36, 201 (2015).

[2]   H. W. Lu and J. G. Hwu, ECS Trans., 58, 339 (2013).

[3]   Y. K. Lin and J. G. Hwu, IEEE Trans. Electron Devices, 61, 3217 (2014); 3562 (2014).