Porous Silicon in Microelectronics: From Academic Studies to Industry

Tuesday, October 13, 2015: 10:50
102-B (Phoenix Convention Center)
G. Gautier (Université de Tours/GREMAN/CNRS/CEA/INSA-CVL), T. Defforge (Université de Tours/GREMAN/CNRS/CEA/INSA-CVL), S. Desplobain (Silimixt Tours), J. Billoué (Université de Tours/ GREMAN/ CEA/INSA-CVL), M. Capelle, P. Povéda (ST Microelectronics, Tours), K. Vanga, B. Lu, B. Bardet, J. Lascaud, C. Seck (Université de Tours/ GREMAN/ CEA/INSA-CVL), A. Fèvre (Université de Tours/ GREMAN/ CEA/INSA-CVL), S. Menard (ST Microelectronics, Tours), and L. Ventura (SILIMIXT)
Historically, electronics was the first discipline that sought to exploit the properties of porous silicon (PSi) in the 70’s [1]. Thereafter, the capability of PSi to be used, after full oxidation, to isolate bipolar devices was pointed out. Two decades later, radio-frequency (RF) devices also took advantages of the isolating properties of PSi [2]. Indeed, highly resistive substrates are generally required to reduce eddy currents and capacitive couplings and then, to get high performance passive devices. The insulating properties of PSi, combined with the ability to locate these areas in different resistivity wafers, make this material promising in terms of development of monolithic insulator/semiconductor substrates. Recently, at GREMAN, we demonstrated the improvement of RF functions using large area hybrid substrates on which filters and protection diodes were integrated [3]. Nowadays, efforts are also made in order to stabilize the structure using appropriate post-anodization treatments. PSi magnetic functionalization studies are also in progress in order to improve integrated planar inductor performances. Through collaboration between GREMAN and STMicrolectronics, the way PSi could be used as insulated material in power AC Switch is also investigated. Many architectures involving PSi peripheries can lead to subsequent performance and reliability improvements [4,5,6]. At present, there is no doubt about benefits PSi can bring to microelectronic devices. Many other applications such as integrated sensors [7], solar cells [8], conductive vias [9] or energy microsources [10,11] can also be of a great interest for the microelectronics industry. Nevertheless, until now, PSi is not yet introduced in the field of electronic component manufacturing. Chips manufacturers are still reluctant to invest in this technology. Indeed, acceptance of a new technology associated to new equipment takes time. For example the deep reactive-ion etching took 20 years to reach an installed base of 1000 chambers worldwide. Robert Bosch GmbH is the only currently known big player company using PSi on an industrial scale for the production of pressure sensors [12]. For the sake of the PSi introduction in this field, it is necessary to develop and validate reliable equipments and processes in terms of throughput but also in terms of homogeneous PSi characteristics at wafer level (up to 6 and 8 inches wafer levels). In this paper, we show also recent advances in the field of PSi etching and integration at an industrial level. In particular, we put an emphasis on reproducibility and homogeneity issues, on the wafer warp management using different annealing procedures and the optimization of the electrolyte composition and its ageing. References

[1] Watanabe Y., Arita Y., Yokohama T., and Igarashi Y. (1975) Formation and properties of porous silicon and its application. J. Electrochem. Soc. 122, 1351-1355.

[2] Yu M., Chan Y., Laih L., and Hong J. (2000) Improved microwave performance of spiral inductors on Si Substrates by chemically anodizing a porous silicon layer. Microw. Opt. Techn. Lett. 26, 232-234.

[3] Capelle M., Billoué J., Concord J., Poveda P., and Gautier G. (2014) Monolithic integration of common noise filter with ESD protection on silicon/porous silicon hybrid substrate, Appl. Phys. Lett. 104, 072104-1-4.

[4] Menard S., Gautier G., High-voltage vertical power component, US Patent 20,130,320,395.

[5] Menard S., Hague Y., Gautier G., Vertical Power Component, US Patent 20,130, 228, 822.

[6] Menard S., Gautier G., Vertical Power Component, US Patent 20,140, 217, 462.

[7] Barillaro, G., Bruschi, P., Lazzerini, G. M., & Strambini, L. M. (2010). Validation of the compatibility between a porous silicon-based gas sensor technology and standard microelectronic process. IEEE Sens. J., 10(4), 893-899.

[8] Tobail, O., Reuter, M., Eisele, S., & Werner, J. H. (2009). Novel separation process for free-standing silicon thin-films. Sol. Energy Mater. Sol. Cells, 93(6), 710-712.

[9] Defforge T., Billoué J., Diatta M., Tran Van F., and Gautier G. (2012) Copper selective electrochemical filling of macroporous arrays for through silicon via applications, Nanoscale Res. Lett. 7, 735-742.

[10] Haddad R., Thery J., Gauthier-Manuel B., Elouarzaki K., Holzinger M., Le Goff A., Gautier G., El Mansouri J., Martinent A., and Cosnier S. (2105) High performance miniature glucose/O2 fuel cells based on porous silicon anion exchange membranes, Electrochem. Comm. 54, 10-13.

[11] Westover A. S., Freudiger D., Gani Z. S., Share K., Oakes L., Carter R. E., and Pint C. L. (2015) On-chip high power porous silicon lithium ion batteries with stable capacity over 10000 cycles, Nanoscale 7(1), 98-103.

[12] Boehringer M., Artmann H., and Witt K. (2012) Porous Silicon in a Semiconductor Manufacturing Environment, J. Microelectromech. Syst. 21, 1375-1381.