(Invited) Low Power Stt-Mram and Its Application to Normally-Off Processor

Thursday, October 15, 2015: 08:40
Curtis B (Hyatt Regency)
N. Shimomura, D. Saida, T. Daibou, Y. Kato, C. Kamata, S. Kashiwada, Y. Osawa, H. Noguchi, J. Ito, S. Fujita (Toshiba Corporation), and H. Yoda (Toshiba Corporation)
Reduction of the power consumption of mobile electronic devices is one of the principal issues in current and future electronics technology. In particular, reducing the power consumption of the processor is critical because it increases as the processor’s performance improves.

Normally-off computing is one of the solutions. Standby power of a cache memory while the device power is on but the memory is idle accounts for a large proportion of the processor’s power consumption, which can be eliminated by shutting down the cache memory during the idle time and turning it on instantly when the memory becomes active. The key technology for the normally-off processor to reduce power effectively is a fast, low-power, non-volatile memory for the cache memory to replace the current SRAM cache memory.

Among the various non-volatile memories, Spin Transfer Torque Magnetoresistive Random Access Memory (STT-MRAM) is the most promising candidate for the cache memory of the normally-off processor because of its potential performance in terms of fast switching and scalability. A magnetic tunnel junction (MTJ) storage element having perpendicular magnetization (p-MTJ) reduces the writing current of the STT-MRAM, which enables scaling of the STT-MRAM.

However, for power saving of the normally-off processor, small write current and short write pulse duration time must be achieved simultaneously. In other words, write charge, which is write current multiplied by write pulse width, is a key parameter for power saving. Toshiba demonstrated STT switching of the p-MTJ with write charge of 90 fC whose write pulse width was 1 ns and write current was 90 uA. Simulation of the processor’s power consumption with this STT MRAM showed good power saving.

Landau–Lifshitz–Gilbert (LLG) micromagnetic simulation of spin-transfer torque shows that a coherent precession of the spin plays an important role for fast switching of the p-MTJ. Initially, when the write current is applied to the p-MTJ, each spin precesses independently and the spin stays in the initial direction. It corresponds to incubation delay time. Immediately after the precession of each spin is synchronized and rotates coherently, switching of the spin begins. Therefore, the coherency of the spin precession needs to be controlled for further improvement of the fast switching of the p-MTJ.

A part of this work was supported by NEDO.