Lead Free Metal-Ferroelectric-Insulator-Semiconductor Devices for Non-Volatile Memory Appliactions

Wednesday, October 14, 2015: 15:40
Curtis B (Hyatt Regency)
R. Medwal (University of Puerto Rico), S. Gupta (Department of Physics, University of Puerto Rico), S. P. Pavunny (Dept. of Physics, University of Puerto Rico), R. K. Katiyar (Dept. of Physics, University of Puerto Rico), R. Thomas (Centre Énergie, Matériaux et Télécommunications), and R. S. Katiyar (University of Puerto Rico, University of Puerto Rico-Rio Piedras)
The polarization bistability of the ferroelectric material offers the possibility to develop dense, energy efficient, fast and non volatile ferroelctric random access memory (FeRAM) with long retention and high endurance, as a promising replacement to both DRAM and Flash for the continued scaling. With this motivation, metal-ferroelectric-insulator-semiconductor (MFIS) structures were fabricated on p-Si <100> semiconductor substrate, by first depositing a 6 nm thick amorphous DyScO3 high-k insulator layer using metal organic chemical vapor deposition (MOCVD), followed by a 265 nm thick polycrystalline BiFeO3 (BFO) ferroelectric layer employing radio frequency (RF) sputtering, and finally a 40 nm thick platinum metal layer by DC magnetron sputtering. Electrical properties of the developed MFIS (Pt/BiFeO3/DyScO3/SiOx/Si) stacks were characterized as a function of thermal agitation (200 K to 400 K) to evaluate their device performance. Fat hysteresis loop was observed in the frequency dependent (1 kHz-1 MHz) capacitance-voltage (C-V) measurement with a memory window (ΔVFB) of 0.8 V at an exceptionally very low sweep voltage of ± 2 V.  The memory window increased to 2.2 V as the sweep voltage was raised to ± 4 V and beyond up to ± 8 V, indicating a highly stable device. Low leakage current (1.2 μA/cm2 at 4 V) and excellent data retention characteristics with distinguishable high and low capacitance values over the long time period of 106 sec, revealed strong charge storage potential of the fabricated device architecture. The non-linear hysteretic J-E curves of the MFIS structure were also investigated in detail as a function of temperature to understand the device reliability and the charge transport mechanisms. Piezoelectric force microscopy (PFM) and P-E hysteresis loop (domains reversal) studies were carried out to confirm the ferroelectric nature of the polycrystalline BFO thin films. The encouraging results achieved reveals that Pt/BiFeO3/DyScO3/SiOx/Si MFIS device architecture is a promising one for realization of FeRAM devices.