The Charge Pumping (CP) technique has been used to characterize insulator semiconductor interface traps in numerous device types and in a wealth of situations [1]. A few years ago and for the first time, the three basic CP curves types recorded from conventional silicon MOSFETs with thick SiO₂insulating films have been simulated very accurately in a large range of experimental conditions [2, 3], demonstrating that the model derived satisfactorily accounts for the CP mechanisms and that the properties of the traps introduced, i.e. their distribution and electrical characteristics, were plausible. As far as we know no more recent results have been published in that field. Indeed, one may expect the electrical CP response of gate stacks with high-k dielectrics to be even more difficult to tackle [1].

A part of the above results has been used more recently to investigate the meaning of CP curve edges [4]. This study pointed out the role that surface potential plays in interface traps filling and in CP curves shape. It was also shown that the Si-SiO₂interface trap density, Dit, usually extracted as proposed in [5], can be very simply obtained from the slope of the CP curve edges [4].

Besides, a few months ago, several Pbo centers, the amphoteric defect well-known to be the main trap type at the Si(100)-SiO₂ interface after SiO₂ growth have been identified in deep submicron area MOSFETs [6], pursuing the story of the Si-SiO₂interface electrical characterization.

In this paper, starting from the results presented in [2, 3], the essential of the model, the major advances with regard to previous work and the main conclusion that can be drawn concerning the CP mechanisms will be recalled. The impact of the gate signal parameters on carrier capture and emission will be detailed. The contributions to the overall CP signal of the different traps introduced along with the impact on the CP curve shape of their characteristics will be presented. The limitations of this approach will also be pointed out.

 [1] Nanoscale CMOS – Innovative Materials, Modeling and Characterization, Ch. 15, Characterization of interface defects, by P. Hurley, O. Engström, D. Bauza, and G. Ghibaudo, Edited by F. Balestra, Ed. ISTE-Wiley 2010.

[2] D. Bauza, IEEE Trans. Electron Devices 56, 70, (2009).

[3] D. Bauza, IEEE Trans. Electron Devices 56, 78, (2009).

[4] D. Bauza, International Reliability Physics Symposium (IRPS) 2013, paper GD-2.

[5] G. Groeseneken, H.E. Maes, N. Beltran, and R. F. De Keersmaeker, IEEE Trans. Electron. Devices 31, 42 (1984). 

[6] T. Tsuchyia and Y. Ono, Jap. J. Appl. Phys. 54, 04DC01 (2015).