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Performance Analysis of InAs/AlSb MOS-HEMT by Self-Consistent Capacitance-Voltage Characterization and Direct Tunneling Gate Leakage Current

Tuesday, 31 May 2016: 12:10
Sapphire 410 A (Hilton San Diego Bayfront)
I. Ahmed, S. Chowdhury (Bangladesh University of Engineering and Technology), M. H. Alam (University of Texas, Austin), I. A. Niaz (University of California, San Diego), and Q. D. M. Khosru (Bangladesh University of Engineering and Technology)
Recently, III-V materials have attracted great interest among researchers in exploring the substitution of the Si channel in scaled logic field-effect transistors [1]. To enhance mobility and speed, High Electron Mobility Transistors (HEMTs) are being experimented with III-V materials. As a result, different material systems for HEMTs are appearing. InAs/AlSb HEMTs have appeared as a promising device as it has electron mobility as high as 30000 cm2/Vs, fT and fMAX exceeding 230 GHz [2]. However, technological limitations are the low breakdown voltage associated with the narrow bandgap of the InAs channel and additional gate leakage current due to staggered band alignment at the InAs/AlSb heterojunction. Recently high breakdown field of 5MV/cm and reduced gate leakage current of e-beam evaporated Al2O3on top of conventional InAs/AlSb HEMT structure has been reported experimentally by H. K. Lin et al [3]. But a complete self-consistent study and gate leakage current analysis of this device are yet to be done. In this work, we have performed a complete study of Capacitance-Voltage (CV) characteristics and Direct Tunneling (DT) gate leakage current using self-consistent Schrӧdinger-Poisson method in InAs/AlSb Metal-Oxide-Semiconductor HEMT (MOS-HEMT) by varying different process parameters as well as physical parameters like oxide thickness, channel thickness, capping layer composition, dielectric variation, delta doping concentration and temperature.

We have investigated CV characteristics and DT gate leakage performance of the structure shown in figure 1 [3] by self-consistent simulation of 1-D coupled Schrӧdinger and Poisson equation [4]. We have used finite difference method for solving Poisson equation [5] and hamiltonian matrix formalism [6] for solving Schrӧdinger equation numerically. Strain effect is also incorporated in this simulator [7]. DT gate leakage current is obtained using the method where transmission probability is calculated using modified Wentzel–Kramers–Brillouin (WKB) method [8]. In our work, we have calculated transmission probability using transmission line analogy [9]. The conduction band diagram and carrier profile of the device obtained from the simulation are illustrated in figure 2.

Figure 3 shows the CV characteristics for different channel thicknesses. There are two cross-over points in the curve which can be justified by the change of slope of sheet carried density with respect to the gate voltage. The gate leakage current decreases with channel thicknesses and this variation is shown in figure 4. This behavior can be explained by the upshift of eigen energies in the well as channel thickness is decreased which further causes reduction of transmission probability.

CV characteristics are not affected by the change in dielectric material having same Equivalent Oxide Thickness (EOT) as shown in figure 5. However, gate leakage current is significantly reduced with the replacement of high-k HfO2 in place of Al2O3shown in figure 6. This can be justified by the fact that channel sheet carrier density remains same with the variation whereas gate leakage reduces due the reduction in transmission probability with the replacement of high-k dielectric.

We have investigated CV characteristics and DT gate leakage current with self-consistent method for InAs/AlSb MOS-HEMT. We have observed that gate leakage current can be significantly reduced by using high-k dielectrics or thick channel layer. Our simulation work provides consistent trends of variations with the experiments [3] and shows how the performance of InAs/AlSb MOS-HEMT can be improved by varying appropriate physical/process parameters.


References:

[1] D. H. Kim and J. A. Del Alamo, IEDM Technical Digest, 861 (2009).

[2] J. Bergman et al, Device Research Conference Proc, pp. 243-244 (2004).

[3] H. K. Lin et al, Solid-State Electronics, 54(5), pp. 505-508 (2010).

[4] F. Stern, Physical Review B, 5(12), p. 4891 (1972).

[5] J. Kisulaas, Cambridge University Press (2nd Edition), 2009.

[6] J. Pipreck, Academic Press, pp. 27–32 (2003).

[7] S. Datta, Cambridge University Press, 2005.

[8] N. Yang et al, IEEE Transactions on Electron Devices, 46(7), pp. 1464-1471 (1999).

[9] A. N. Khondker et al, Journal of Applied Physics, 63, pp. 5191-5193 (2009).