Tuesday, 31 May 2016: 11:30
Aqua 309 (Hilton San Diego Bayfront)
As the IC industry approaches devices with half pitches below 10 nm, etching requires atomic scale fidelity because the device dimensions and their allowed tolerances are of the same order of magnitude as the inter-atomic distances in the crystal lattice. Atomic Layer Etching is emerging as a solution and plasma assisted or directional ALE is being adopted in the manufacturing of integrated devices /1/.
Separation of the etching process into single unit processes allows to apply the large body of knowledge in surface science to improve fundamental understanding. In this talk we will focus on the fundamental processes at the wafer surfaces during etching of various materials with different ALE approaches. Strategies to obtain low physical and chemical surface damage will be presented.
1. K.J. Kanarik, T. Lill, E. Hudson, S. Tan, S. Sriraman, J. Marks, V. Vahedi, R.A. Gottscho; J. Vac. Sci. Technol. A 33, 020802 (2015)