v(t) and i(t) are respectively the voltage and the current in the device, R(Q,X) is the memristance of the device, X is the set of controlling variables. Equation (3) is the general relation between charge and current, and is used without change along this paper. A special case of (2) is the POP equation (power-off plot), which is the case of no external forcing stimuli. For a memristor to be used as a non-volatile memory (as ReRAMs or PCM are), the POP equation (2) must equal zero for i=0 and any Q and X. Otherwise, X and, thus, R(Q,X) will change with time.
In semiconductor devices, many phenomena involving some charge trapping and releasing are easily described with equations (1)-(3). Let’s analyze two different cases where this formalism is helpful: contact effects and hysteresis effects.
Usually, contact effects are modeled using some passive elements, like resistors or diodes. There are other approaches, however, that model them in a more physical way  which can be very easily reformulated using memristor formalism as in equations (4)-(5).
dVth/dt= a·i(t)-b·(Vth-Vth0) (5)
There, a and b are constants related to the probability of trapping and releasing charge at the interface, M and n are constants of the material, and Vth0 is the unperturbed threshold voltage. The physical mechanism behind the contact effect is a change in the effective barrier of the metal-semiconductor interface due to the charge trapped in there. Thus, memristors can be used as a discrete contact effect element, and implemented as a parasitic element.
Another effect observed in transistors is hysteresis, defined as a difference of the transistor characteristics between two consecutive measurements for identical inputs. As shown in , hysteresis can be explained as a change in the threshold voltage due to the accumulation of charge in the gate interface. This change can be described as in equations (6)-(7):
dVth/dt= a·i(t)-b·(Vth-Vth0) (7)
where a and b and Vth0 have the same meaning as in (4)-(5), f is the model for the current, Vgs is the gate-source voltage, and Vds is the drain-source voltage. Notice that the POP equation (7) doesn’t equal zero at i=0, so the system will relax back to its ground state Vth=Vth0. Figure 1 shows the effect of applying consecutive up and down Vgs ramps for a fixed Vds on a device modeled using this schema. As can be seen, the effect of hysteresis is higher at high currents, an leads to a change in the effective threshold voltage, as observed in real devices.
Another mechanism producing hysteresis is the change in the mobility due to the filling of traps in the semiconductor. In the VRH model , this leads to a change of the mobility. This effect seems to be smaller than the contribution of the change in threshold voltage in organic transistors, while it can be important in organic solar cells. Using the generic mobility model with two parameters , we obtain equations (8)-(10):
dVaa/dt= a1·i(t)- a2·(Vaa-Vaa0) (9)
dTa/dt= b1·i(t)- b2·(Ta-Ta0) (10)
where Vaa and Ta are the parameters of the mobility model, related to the trap distribution and the rest of the semiconductor characteristics . Notice that equations (9)-(10) are a linear approximation by neglecting higher order non-linear terms.
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