Saturation current of a MIS (p) tunnel diode is strongly dependent on the Schottky barrier height. It was found a gate MOS capacitor near an MIS tunnel diode may affect the saturation current of the tunnel diode. It was supposed that the increase of electron diffusion from a gate MOS capacitor will cause the decrease of the Schottky barrier height and lead to the increase of saturation current [1]. Furthermore, transistor characteristic of this structure was also proposed [2]. By varying gate bias, electron diffusion current varies as well. Since two current states of the tunnel diode occurs, this device can be considered as a transistor. In this work, different gap distances between gate and MIS tunnel diode were studied. It was found that a smaller gap distance may lead to a stronger couple effect. Hence, reduction of gap distance can both enhance tunnel diode saturation current and the I_on / I_off ratio of the gate-controlled MIS tunnel transistor.

The schematic top view and cross section of the gate-controlled MIS tunnel transistor is shown in Fig. 1. We named the inner MIS tunnel diode drain and the outer ring gate. The radius of the inner circle, R₁, is 85μm. The gap distance, S, is varying from 5μm to 25μm. The radius of the outer ring, R₂, is (585+S)μm. Fig. 2(a) shows I_D versus V_D with gate floating. The sample without gate structure is denoted as no ring. It can be regard as the gap distance is infinity. Fig. 2(b) shows the saturation current I_D,sat versus gap distance of two different oxide thickness. We found that the saturation current increases as the gap distance reduces. Fig. 2(c) and (d) shows the schematic of the mechanism, which can be explained by couple effect. When the gap distance reduces, couple effect becomes stronger, and the electron diffusion from gate’s inversion layer to drain increases, which leads to a larger drain saturation current.

Fig. 3(a) shows the I_D-V_G of the gate-controlled MIS tunnel transistor for different gap distances and V_DS’s. It was shown that there are on state and off state for I_D. For the on state, the gate bias voltage is around 0V, and the gate MOS capacitor is in inversion region, which introduces a large number of electron to couple to drain. We found that when V_DS is smaller than V_sat, I_D are irregular because I_D do not saturate so it do not follow the rule as observed in Fig. 2(b). However, when V_DS is larger than V_sat, drain current becomes I_D,sat and increases with the reduction of gap distance. For the off state, gate bias is near V_FB, the gate MOS capacitor is close to accumulation region. In this situation, the electron concentration underneath gate is less than the electron concentration in bulk n_p0. Only a little electron diffusion from the gap region to drain, and leads to a quite low I_D. The off current is therefore decreases as the gap distance reduces. Fig. 3(b) shows the schematic of the mechanism. When the gap distance becomes smaller, the electron concentration of the gap region decreases due to the stronger couple impact of the gate MOS capacitor, and leads to the decrement of I_D. We called this phenomenon as strong couple effect. Fig. 3(c) and (d) show I_on and I_off versus gap distance and the I_on / I_off ratio of drain current of different oxide thickness. It is found that for the smaller gap distance, we got smaller I_off and larger I_on, and therefore a larger I_on / I_off ratio of the gate-controlled MIS tunnel transistor. Moreover, in Fig.3(c), it was found that when oxide thickness increases, I_on increases and I_off decreases, so a larger I_on / I_off ratio can be obtained.

For a gate-controlled MIS tunnel transistor, we use the bias of gate to control the drain MIS tunnel diode by couple effect. In this work, we found that reduction of gap distance can enhance the couple effect of on state and enhance strong couple effect to reduce the off state current. A large I_on / I_off can be expected. In conclusion, the design of proper small gap distance is the way to improve the performance of a gate-controlled MIS tunnel transistor.

This work was supported by the Ministry of Science and Technology of Taiwan, ROC, under Contract No. Most 105-2221-E-002-180-MY3 and 106-2221-E-002-196-MY3.

[1] C. S. Liao and J. G. Hwu, ECS Trans., 75(5), 77 (2016)

[2] C. S. Liao and J. G. Hwu, IEEE Trans. Electron Devices, 62, 2061 (2015)