In order to address the high demand for CMOS scaling, novel structures and new materials are being introduced at a rapid pace for the silicon industry in the recent years. It is very critical for nanoscale devices such as (FinFETs) and nanowire FETs (NW-FETs) to employ channel materials with high electron and hole mobility. Therefore, Germanium has returned to the picture with its high bulk hole and electron mobility, which are approximately four and two times higher than conventional Si channel, respectively. Moreover, Ge has a room temperature direct band gap of 0.8 eV (~ 1.55 µm) which is only separated by 0.14 eV from its indirect band gap (0.67 eV) and therefore it acts as a strong absorber in the near-infrared light spectrum. This allows for simultaneous fabrication of photodetectors and Si CMOS receiver circuits in a monolithically integrated fashion. However, fundamental issues with Ge such as the lack of stable germanium native oxide, its water solubility, and the poor physical and electrical properties of high κ oxide/Ge interfaces make it difficult to fabricate high-quality electronic or optoelectronic devices. Furthermore, heteroepitaxial growth of high-quality films on silicon is very challenging due to the 4.2% lattice mismatch between the two materials. Several research groups have reported high quality Ge layers on Si, however, temperatures as high as 650 ̊ C were used in performing the epitaxial deposition. The goal of this work is to deposit a Ge layer with low surface roughness and an acceptable threading dislocation density (TDD < 10⁷ cm^-2) values at low deposition temperature. In this paper, a low temperature deposition of germanium films on silicon is performed using radio frequency plasma enhanced chemical vapor deposition (RF-PECVD). A two-step temperature technique and different GeH₄ flow rates have been employed during the deposition process. The structural, the electrical and the optical properties of 700 nm Ge films have been investigated. Study of the surface morphology of low temperature Ge seed layer revealed that a surface roughness as low as 0.5 nm can be achieved with in-situ low temperature annealing in rich H₂ chamber. Also, the Fast Fourier Transform pattern taken at the same area imaged by TEM for the seed layer exhibited crystalline nature due to the hydrogen induced crystallization. Furthermore, study of the post annealed Ge layers at different temperatures in H₂ and N₂ gas ambient revealed an improved electrical and transport properties of the films treated at T<600⁰ C. Also, samples annealed at 550⁰ C show the lowest threading dislocation density (TDD) of ~1x10⁶ cm^-2. In addition, metal-oxide-semiconductor capacitors (MOSCAPs) and metal-semiconductor-metal photodetector (MSM) are fabricated based on Ge growth using the low-temperature two step deposition technique. For MOSCAPs, the electrical characteristics of 9 nm Al₂O₃/i-Ge/Si MOSCAPs exhibits n-type (p-channel) behavior and normal high frequency C–V responses. In addition to CV measurements, the gate leakage vs applied voltage is measured and discussed. The Ge/high-κ interface trap density vs. surface potential is extracted with peak value of ~ 1x10¹² eV^-1 cm^-2. For MSM photodetectors fabricated using low temperature Ge layer grown directly on Si, the possibility to suppress leakage current in Ge MSM detectors have been investigated by inserting large band gap material. A 5-20nm layer of n-type Si:H is used as a barrier layer to engineer the SHB. Results revealed that ~4 order of magnitude reduction of dark current is achieved by inserting ~20nm layer of a- Si:H. Furthermore, the photo response of the detector is tested under 1310 nm laser light. A responsivities of 0.9 A/W is achieved at 1 V reverse bias for detector fabricated with 20nm barrier layer compared to 0.5A/w of the one without barrier layer. The low temperature processing of Ge/Si demonstrates a great potential for p-channel transistors and optical detectors applications in monolithically integrated CMOS platform.