Processes for Advanced Integrated Circuits 1

Monday, 14 May 2018: 14:00-16:00
Room 307 (Washington State Convention Center)
Chairs:
Zia Karim and Paul J. Timans
14:00
1372
Characteristic Change of GeO2/Ge Interface by Hf-Post Metallization Annealing
H. Fujiwara, Y. Iwazaki, and T. Ueno (Faculty of Technology, Tokyo Univ. of Agri. and Tech.)
14:20
1373
Low Temperature Growth of Germanium on Silicon Using RF-PECVD for Electronic and Optoelectronic Application
G. Dushaq (New York University, New York Univesity), A. Nayfeh (Masdar Institue of Science and Technology, Abu Dhabi, UAE), and M. Rasras (New York University)
14:40
1374
Improved C-V Hysteresis and Two-States Characteristics in MIS (p) Structure with Elongated Thin Metal Gate
C. D. Lin (National Taiwan University,) and J. G. Hwu (National Taiwan University)
15:00
1375
Drop-in Electrodeposition Processes for Void-Free, High Aspect Ratio Structures of Five Metals
D. Josell and T. P. Moffat (NIST)
15:20
1376
Cu/Cu Barrier Interconnect with Low Resistivity for the Application to the Next-Generation and High-Resolution Display Fabricated Using Microwave-Assisted Sputter
W. Jeong (KAIST), J. C. Do, J. R. Lee, W. W. Park (AVACO), J. Shin, and S. H. K. Park (KAIST)
15:40
1377
Electrochemical Characterization of Ruthenium Using Potassium Bromate as Oxidizer for Titania-Based CMP Slurry
K. Yadav, M. Ramachandran, and S. N. Victoria (National Institute of Technology Raipur)
See more of: G01: Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 8
See more of: Electronic Materials and Processing
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