In this address, we seek to illustrate that high-k gate oxides and low-k ILDs represent just a small fraction of the numerous dielectric materials utilized in nanoelectronic products and that numerous new applications for dielectric materials are emerging as the industry transistions to novel patterning schemes and prepares for life post CMOS scaling. We will begin by briefly exploring the entirety of dielectric materials utilized in advanced nanoelectronic products with a particular focus on often ignored etch stopping, diffusion barrier, and passivation dielectrics and their more specialized requirements relative to high-k and low-k dielectrics. We will then transition to examining the various novel pitch division schemes being developed to cope with the delay of EUV lithography and the abundant new dielectric material applications these schemes create. We will specifically focus on the various new spacer and hard mask dielectrics that pitch division requires, their colorful selectivity requirements, and suggest future research needed to enable even more exotic patterning schemes.
We will further examine how what was once old can become new again and specifically explore how both high-k and low-k dielectrics are being utilized to fill the needs of future beyond CMOS devices. In particular, the application of high-k and low-k dielectrics in novel resistive switching, magnetic, and nano-electro-mechanical device and sensor applications will be surveyed along with the research needed to extend these materials into even more diverse applications. We will conclude by reviewing the unique obstacles that dielectric materials present for the realization of advanced cryogenic quantum computing architectures and the necessary associated research vectors to prevent dielectrics from becoming quantum computing’s Achilles heel.