Parallel self-aligned fabrication methods in modern silicon-based microelectronics have enabled sub-lithographic registration between processing steps, ultimately facilitating substantial advances in circuit complexity over the past few decades. In contrast, while carbon nanotubes and related nanoelectronic materials have shown significant potential for digital and analog electronics due to their high mobilities, ultrathin geometry, and broad range of permutations in van der Waals (vdW) heterojunctions, devices based on vdW nanoelectronic materials have not fully exploited parallel self-aligned fabrication. Here, introduce a self-aligned processing methodology that enables the realization of field-effect transistors with channel lengths below 150 nm with minimal short-channel effects and improved current saturation, as demonstrated with semiconducting carbon nanotubes and monolayer MoS₂. In vdW heterojunctions, this self-aligned approach allows dual-gate electrostatic control of the carrier density in both of the constituent semiconductors while concurrently achieving independent gate control of the short-channel series transistors. Since this self-aligned methodology is compatible with a diverse range of nanoelectronic materials and can be implemented in parallel via large-area lithographic processes without sacrificing lateral spatial resolution, it is likely to impact a wide range of vdW heterojunction devices.