Individual semiconducting single-walled carbon nanotubes (s-SWCNTs) exhibit the high charge-carrier mobility, current carrying capacity, and sensitivity needed for applications based on thin-film transistors (TFTs) such as flexible electronics, displays, and sensors. However, assembling s-SWCNTs into aligned arrays to exploit the exceptional electronic properties of this material has been a major roadblock toward the integration of s-SWCNTs into electronic devices. Here, we are able to use confined shear-based alignment to fabricate aligned arrays of s-SWCNTs across arbitrarily large substrates.

In this study, we demonstrate that large amounts of shear can be used to align s-SWCNTs from solution by forcing s-SWCNT ink at high volumetric flow rates through 20 - 100 µm tall channels on SiO₂ substrates. We use Raman spectroscopy to quantify the ratio of the Raman G band (~1590 cm^-1) to the Si peak (~520 cm^-1) of our films. This ratio provides a measure of the amount of s-SWCNTs deposited. We study the deposition from three concentrations of ink (~70, 35, and 7 µg mL^-1) while varying the volume of ink used at a set shear rate of 3.2*10⁵ s^-1. The G/Si ratio behavior is similar for each concentration. Initially, there is a steep increase in the G/Si ratio up to 100 µL of ink, after which, the G/Si ratio increases linearly with increasing volume of ink.

Polarized Raman spectroscopy is used to quantify the disorder in the film. We show that for the s-SWCNT ink concentrations used in this study, the concentration does not affect the degree of alignment in the aligned s-SWCNT films and that the shear rate is the main factor affecting the alignment. Assuming the s-SWCNTs are oriented within a Gaussian angular distribution, from polarized Raman spectroscopy, the angular width of distribution was measured to be σ = 30° for a shear rate of 3.2*10⁵ s^-1 regardless of ink concentration and volume. This degree of alignment makes this technique non-ideal for fabricating devices with small channel lengths for high-performance applications such as logic or radio-frequency devices. However, for long-channel devices, there must be some amount of disorder in the s-SWCNT films to allow for charge percolation. This means this shear alignment technique is ideal for fabricating films for long-channel devices such as TFTs. Here, we fabricate transistors from films of shear-aligned s-SWCNTs and study the effect of degree of alignment on the transistor performance.

Because of the simplicity of this technique, we are able to scale the deposition of aligned s-SWCNTs to arbitrarily large areas as long as the high shear rate is maintained. This makes the technique ideal for large-area scaling in industry applications. As a demonstration, we show the large-area, uniform alignment of s-SWCNTs via confined shear-based alignment across a 4” wafer.