Fabrication of integrated circuits (IC) in the sub-micron regime utilizes shallow trench isolation (STI) to separate active circuits with a dielectric material, tetraethyl orthosilicate (TEOS). CMP is used to remove the excess TEOS layer to achieve planarity and expose the underlying structure without inducing defects. In an ideal system, the removal of TEOS is facilitated by colloidal suspensions (slurries) containing abrasive ceria (CeO₂) nanoparticles and chemistry to produce defect free substrates. However, residual CeO₂ particles can become embedded at the interface leading to defects impacting device performance. Current industrial methods of removing particles use Standard Clean-1 (SC-1), incorporating concentrated NH₄OH and H₂O₂ to chemically remove organic contaminants and abrasive particles. This work set out to investigate particle encapsulation using novel polyelectrolyte and surfactant based chemistry to enhance electrostatic repulsions that occur at the interface during post-CMP cleaning. In-situ studies utilizing dynamic light scattering and turbidity measurements have provided insight regarding the role of polyelectrolyte and surfactant concentration during the cleaning process. The formulated cleaning chemistry was evaluated under small scale brush cleaning to clean polished TEOS wafers, which were then processed with fluorescence microscopy to determine particle removal efficiency. Analogous to SC-1, the cleaning chemistry shows comparable particle removal; however at an increased efficiency, making it a viable alternative to traditional cleaning methods.