1386
Quasi-Zero-Voltage Controlled Etching of Macropores in n-Type Silicon

Tuesday, 15 May 2018: 15:40
Room 307 (Washington State Convention Center)
L. M. Strambini (Consiglio Nazionale delle Ricerche), C. Cozzi, and G. Barillaro (University of Pisa)
Here, we report for the first time on the controlled and accurate photoelectrochemical etching of macropores in n-type silicon in hydrofluoric acid-based electrolytes at anodic voltages below the electropolishing peak value down to quasi-zero Volt. Our results break a new ground on the controlled electrochemical dissolution of n-type silicon by further improving flexibility of this technology and pushing it towards commercial microelectronic applications.

In the last few years the electrochemical micromachining (ECM) technology, which is based on the photoelectrochemical etching (PECE) of n-type silicon, is increasingly emerging as a promising silicon microstructuring technique alternative to standard both dry and wet etching tools1. A number of high aspect-ratio three-dimensional microstructures and microsystems have been reported over the past 10 years with applications ranging from automotive and biomedics to microelectronics and nanomedicine.

The golden rule for the controlled PECE of macropores in low doped n-type silicon states to conduct the etching at anodic voltage values (Vetch) above the electropolishing voltage value VPS (typically of a few Volts)2-5. Nonethless, even at Vetch>VPS there are a few constraints that limits the feasibility of macropores with arbitrary size and pitch. Specifically, it has been suggested that the maximum diameter of stable pores (about 10 μm for silicon of a few Ωcm) depends on the resistivity of the silicon substrate3,5. Moreover, the maximum pore pitch (about 20 μm for silicon of a few Ωcm) appears to be roughly limited to twice the depletion region at the silicon/electrolyte interface3.

The starting material is a (100) oriented, n-type silicon wafer, with a resistivity of 3÷8 Ω∙cm and thickness of 750 μm, provided with a thermally grown 200-nm-thick silicon dioxide layer. A square lattice of holes with side of 4 μm and pitch of 20 μm was defined on the front surface of the silicon wafer by standard photolithography followed by buffered hydrofluoric acid (BHF) etching of the silicon dioxide and potassium hydroxide etching of silicon through a photoresist mask. Patterned wafers were electrochemically etched for 6000 s under back-side illumination (250 W halogen lamp) by using an aqueous solution of HF (concentration of 5% by vol).

The current density/voltage (J/V) curve of the n-type silicon-electrolyte system under investigation has an electropolishing peak (VPS, JPS) at JPS =70.0 mA/cm2 (± 0.5 mA/cm2) and VPS=1.2 V. The same initial current density value Jetch0=4.8 mA/cm2 was used for all the experiments. The Jetch value was then varied over time to ensure the etching of macropores with constant diameter over depth1,2,4. The anodic voltage values Vetch was varied among the different experiments from 0 to 2 V. Eventually, the electrochemically etched wafers were rinsed in ethanol and dried at 60 °C for 10 min. For each Jetch-Vetch parameter pair were performed 3 experiments, at least.

Notice that, three of the Vetch values (i.e. 0, 0.4 and 0.8 V) are below the electropolishing peak value VPS and one is above (i.e. 2 V).

Macropores etched at Vetch>VPS (i.e. 2 V) show a significant lateral branching and, in turn, a major roughness on the inner surface. This was somehow expected as both pitch (about 20 μm) and size (about 10 μm) are at close to the maximum features controlled by PECE according to the state-of-the-art literature3. On the contrary, the etching at Vetch<VPS led to very exciting and totally unexpected results, with the formation of regular macropores array without missing pores at any of tested voltages. Moreover, pore branching was significantly reduced as the anodic voltage was diminished below VPS and it completely disappeared at 0 V. A quantitative analysis of average values of etched macropores in terms of length and size points out that as the anodic voltage is reduced below the electropolishing value VPS regular macropores with reduced roughness, increased size, and shorter length are etched. We argue that the lower anodic voltage enables clustering of oxide patches at the tip of macropores over larger areas, compared to higher anodic voltages, thus slowing down the etching process in the vertical direction and increasing, in turn, the macropore diameter.

  1. Bassu, S. Surdo, L. M. Strambini, G. Barillaro, Advanced Functional Materials, 2012, 22 (6), 1222-1228.
  2. Föll, M. Christophersen, J. Carstensen, G. Hasse, Materials Science and Engineering R, 2002, 39(4), 93-142.
  3. Lehmann, Electrochemistry of Silicon: Instrumentation, Science, Materials, and Applications, Wiley-VCH, ISBN: 3-527-29321-3, Weinheim, 2002.
  4. Barillaro, F. Pieri, Journal of Applied Physics, 2005, 97, 116105-3.
  5. Barillaro, L.M. Strambini, Electrochemistry Communications, 2010, 12, 1314-1317.