Processes for Advanced Integrated Circuits 2

Tuesday, 15 May 2018: 14:00-18:00
Room 307 (Washington State Convention Center)
Chairs:
Kuniyuki Kakushima and Zia Karim
14:00
1383
(Invited) Development of Plasma Atomic Layer Etching in Close-to-Conventional Etch Tools
M. Cooke and A. Goodyear (Oxford Instruments Plasma Technology)
14:40
1384
Ultra-High Sensitivity Surface Photovoltage Measurement of Heavy Metal Contamination in Silicon Wafers with Fast Metal Identification
M. Wilson, A. Savtchouk, J. D'Amico, B. Schrayer, D. Marinskiy, P. Edelman, C. Almeida, T. Zajac, A. D. Findlay, and J. Lagowski (Semilab SDI)
15:10
1385
Improving the Figure-of-Merit of Integrated Solid-State Diodes through the Use of Nanostructured Porous Silicon
L. M. Strambini (Consiglio Nazionale delle Ricerche), M. Marchesi (STMicroelectronics), M. Sambi (ST Microelectronics), F. F. R. Toia (STMicroelectronics, Agrate Brianza, Italy), S. D. Mariani, M. Morelli (ST Microelectronics), and G. Barillaro (University of Pisa)
15:40
1386
Quasi-Zero-Voltage Controlled Etching of Macropores in n-Type Silicon
L. M. Strambini (Consiglio Nazionale delle Ricerche), C. Cozzi, and G. Barillaro (University of Pisa)
16:10
Break
16:30
1387
Model-Based Corona Charge - Kelvin Probe Characterization of Patterned Structures
D. Marinskiy and J. Lagowski (Semilab SDI)
17:00
1388
Effect of Hydrogen on Reliability with Various Deposition Temperatures of Al2O3 Gate Insulator in In-Ga-Zn-O Thin Film Transistors
K. Park (KAIST, Korea Advanced Institute of Science and Technology, Module Development Team, Samsung Display), G. J. Jeon, S. H. Lee, and S. H. K. Park (KAIST)
17:30
1389
Effect of Surface Preparation on the Residual Oxide Thickness and Material Loss of InGaAs Layer
J. Na and S. Lim (Dept. Chemical and Biomolecular Eng. Yonsei University)
See more of: G01: Silicon Compatible Materials, Processes, and Technologies for Advanced Integrated Circuits and Emerging Applications 8
See more of: Electronic Materials and Processing
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