The recent availability of high quality bulk GaN substrates with low threading dislocation density has made vertical power device structures an attractive possibility. Due to the low probability of a threading dislocation occurring within the active area of devices grown upon bulk GaN, reliability is driven by bulk or surface effects. Past work upon the reliability of Ni-GaN Schottky interfaces has suggested that interdiffusion of the Ni into the GaN can occur under thermal stress, adversely affecting the effective energy height of the barrier and increasing the ohmic nature of the interface. Conditions similar to such thermal stressing can be found at typical operating points in high current power devices used in power electronic applications. Our work examines the influence of high current density stress upon the reliability of vertical bulk GaN Schottky diodes. The vertical diodes studied were fabricated with Pd Schottky metallization with an Au ohmic overlayer. To study the effects of surface chemistry, reliability is compared between devices fabricated with different acidic and basic surface preparations, using HCl and KOH respectively. The fabricated devices were subject to life testing under varying levels of constant current density, up to 10 kA/cm^2. The lifetesting system was designed as a stress-measure-stress system, allowing for the evaluation of device parameters in-situ during testing. Electrical parameters indicating the state of the Schottky barrier were evaluated continuously during the measurement points of testing. In addition, a measurement of barrier inhomogeneity, evaluated using the Tung model, was also used as an indication of the condition of the Schottky interface. The microstructure of the interface before and after stress was examined using S/TEM imaging of representative lamellae samples of the stressed and unstressed devices. EDS imaging was used to determine the degree of diffusion between the Schottky metallization and the GaN substrate. Results of microstructure imaging are correlated with the electrical measurements taken to determine the responsible mechanisms for device degradation.