Continuous downward scaling in silicon integrated circuit technology into the sub-20 nm regime has created critical challenges in chip manufacturing, among them, reliability and performance of on-chip interconnects. Current interconnect materials, Cu and W, face increased reliability challenges in the nanoscale as a result of electromigration failures at high current densities. Materials such as nanocarbons, metal silicides, and metallic nanowires are being considered as potential replacements for Cu and W. In particular, due to its superior electrical and mechanical properties as well as much higher current-carrying capacities, carbon nanotube (CNT) is a serious contender to replace Cu and W in on-chip interconnect via. However, the main challenge to functionalizing CNT vias is the metal-CNT contact resistance. To mitigate such challenge, a seamless three-dimensional all-carbon interconnect structure has been fabricated by growing CNTs directly on one or few layers of graphene (MLG). This 3D structure can potentially yield low resistance due to the strong C-C sp² bonding in CNT and graphene and across the CNT-graphene interface. While such growth has been demonstrated, the CNT/graphene interfacial nanostructure and how it impacts the electrical properties of the 3D structure are far from being understood.

Our test structure consists of MLG grown by annealing a Ni thin film in H₂/CH₄ ambient inside a low-pressure PECVD chamber, before being transferred onto an oxide-covered silicon substrate. Vertically aligned CNTs are then grown on the transferred MLG in a PECVD system using a similar recipe as in our previous work on CNT vias, resulting in a 3D all-carbon interconnect structure. Scanning and transmission electron microscopy images reveal CNT alignment and interfacial nanostructure comparable to the CNT-Cr interface in CNT via. The measured resistance of the 3D structure is compared with those of sub-100 nm linewidth CNT vias. Our results demonstrate the feasibility of fabricating a 3D CNT/graphene device, which can serve as the building block for all-carbon interconnects. Enhanced understanding of the relationship between interfacial nanostructure and device resistance can lead to eventual functionalization of contacts between CNT vias and a graphene-based planar interconnect network in the most advanced technology nodes.