Phase change memory (PCM) is a high-speed high-endurance non-volatile electronic memory technology which utilizes the electrical resistivity difference between the amorphous and the crystalline phases of phase change materials, such as Ge₂Sb₂Te₅ (GST), to store information [1]. PCM cells are switched by short duration electrical pulses by melting a small volume to transition to dielectric amorphous phase (reset) or heating above glass-transition temperature to crystallize (set). The cells experience extremely large thermal gradients (~ 50 K/nm) and high current densities (~50 MA/cm²) during reset. Hence thermoelectric (TE) contributions are very significant both in bulk and at the material and solid-liquid interfaces [2]. In this work, we performed finite element simulations of mushroom PCM cells and analyzed contributions of Joule heating (symmetric) and thermoelectric heat (asymmetric) during reset and set operations using COMSOL Multiphysics. A field effect transistor (FET), modeled using a circuit model, is used as an access device. We self-consistently solve for current continuity, heat transport (Fig. 1) and phase changes in the materials, including temperature, electric-field and phase-dependent electrical and thermal conductivity, thermal boundary resistances and latent heat of fusion, along with temperature dependent stochastic nucleation, growth and grain-boundary amorphization, accounting for all energy exchanges [3-6].

Thermoelectric heat exchanges are due to generation and recombination of electrons and holes as well as the kinetic energy absorbed or released by the transported free charge carriers [7]. These energy exchanges can take place at material interfaces (Peltier heat) or in bulk material (Thomson heat). Discontinuity of Seebeck coefficient and temperature (due to thermal boundary resistances) make TE contributions very significant in PCM devices.

Our simulation results show the significance of the TE contributions on the reset behavior of PCM devices (Fig. 2). Self-heating at the bottom TiN-GST interface is substantially higher for one of the current polarities, giving rise to an over-sized mushroom in the case of negative polarity, for the same reset pulse amplitude. The negative polarity case (over-reset cell) cannot be set with the same set pulse as the positive polarity case. From the power consumption and peak current requirement point of view, it is advantageous to have higher TE heating inside the mushroom and its interfaces. TE cooling away from the mushroom interfaces is advantageous for reduced thermal cross-talk and write-disturb on the neighboring cells. However, thermal gradients also need to be kept under consideration for reliability perspective.

Acknowledgement: Md Tashfiq Bin Kashem acknowledges support from General Electric through a Graduate Fellowship for Innovation. This work is supported through US National Science Foundation (NSF) award # 1710468.

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