Experimental Process:

The 100 nm Mo/Al layers were first deposited on a glass substrate and patterned to form the bottom gate (BG) metal, followed by the deposition of 320 nm thick SiN_x/SiO_x gate insulator (GI) using plasma-enhanced chemical vapor deposition (PECVD). For the active layer of SL-TFT, 15 nm a-IGZO with high indium content was deposited to form a high mobility channel (HM-IGZO) using radio frequency magnetron sputtering with Ar plasma. As for the DL-TFTs, an extra standard a-IGZO (STD-IGZO, the atomic composition of the target is In₂O₃:Ga₂O₃:ZnO=1:1:2 mol%) was deposited as a top barrier. Two different top barrier thicknesses were deposited (10 nm and 30 nm) to investigate the thickness effect on the NBIS. The active layer was then patterned by photolithography. A 260 nm Ti was deposited and patterned by photolithography and reactive ion etch (RIE) as the S/D metal, followed by SiO_x/SiN_x top gate insulator deposition and the transparent indium tin oxide (ITO) top gate (TG) metal formation. To conduct the NBIS test, -30 V and 0 V were applied to the bottom gate and the top gate, respectively, and a light source with a wavelength of 365 nm was used as the illumination stress. Additional 100 nm films of HM and STD IGZO were deposited to investigate the band alignment. The bandgap (E_g), valence band offsets (E_F-E_V, where E_F is the Fermi level and E_V is the valence band edge), and work function can be extracted by Tauc method, X-Ray photoelectron spectroscopy (XPS), and Kelvin probe force microscopy (KPFM), respectively, to obtain the band alignment of the HM (channel layer) and the STD (top barrier) IGZO [3].

Results and Discussions:

The evolution of V_T shifts under NBIS are shown in Fig. 1. DL-TFTs have less V_T shift than that of SL-TFT. Since the energy of the photon (3.4 eV) is larger than the bandgap of the a-IGZO (~3 eV), electron-hole pairs are generated by the light source. Since a negative voltage is applied to the BG, the generated holes are trapped into the BG GI, resulting in the negative V_T shift. In DL-TFTs, the holes generated in the top barrier cannot be trapped into the BG GI due to the energy barrier formed by the valence band discontinuity. With the band alignment analysis [1], the valence band discontinuity is found to be 0.39 eV, which is high enough to stop the holes generated in the top barrier from trapping into the BG GI. The electrons generated in the top barrier can still be trapped into the TG GI, compensating the negative V_T shift (Fig. 2(a)), resulting in a smaller V_T shift in DL-TFTs than that of SL-TFTs. Reportedly, the V_T shift increases with increasing a-IGZO thickness in SL-TFTs [4]. However, the V_T shift decreases with increasing top barrier thickness in DL-TFTs (Fig. 1). Although the generated electron-hole pairs in the top barrier increase with increasing top barrier thickness, the additional holes cannot be trapped into the BG GI due to the valence band discontinuity, while the additional electrons can easily be trapped into the TG GI, leading to more V_T shift compensation and thus less negative V_T shift in the DL-TFT (Fig. 2(b)).

Conclusion:

The DL-TFTs have less V_T shift under NBIS as compared to SL-TFTs. The NBIS can be further improved by increasing the top barrier thickness.

Acknowledgment: This work was supported in part by the Ministry of Science and Technology, Taiwan, under Grant MOST 110-2218-E-A49-013-MBK, Grant MOST 110-2218-E-002-030, and Grant MOST 110-2622-8-002-014, and in part by the Ministry of Education, Taiwan, under Grant NTU-CC-110L892601.

Reference: [1] J.-C. Chiu et al., J-EDS (2021) [2] J.-C. Chiu et al., IEDMS (2021) [3] A.-H. Tai et al., TED (2019) [4] M. M. Billah et al., EDL (2016)