System-on-glass requires high-performance thin-film transistors (TFTs). In order to realize high-performance polycrystalline-Si (poly-Si) TFTs, we grew high-quality poly-Si thin films using a continuous-wave solid-state laser, in a method known as continuous-wave laser lateral crystallization (CLC). The grain boundary (G.B.) of CLC poly-Si is characterized by being parallel to the laser scan direction with shape of nearly straight line. Ge-based devices are attractive because of the superior carrier mobility of Ge in comparison to Si; however, as carriers in poly-Ge thin film are high concentration of hole generated from defects, it is difficult to control the level of doping. Moreover, fabrication of stable gate dielectric GeO₂ is highly challenging. Addition of Ge to Si is expected to improve carrier mobility in Si, leading to poly-Si_1-xGe_x TFTs with better performance than conventional poly-Si TFTs. Hence, our work here is a step in that direction. The purpose of this study is to understand the performance of poly-Si_1-xGe_x TFTs, and to highlight the issues pertaining to poly-Si_1-xGe_x thin films by comparing the performance of poly-Si_1-xGe_x TFTs with that of poly-Si TFTs.

A typical TFT fabrication process is as follows. An amorphous Si_1-xGe_x thin film (~100 nm) with a Ge concentration of 10% is grown on a quartz substrate. After cleaning the substrate surface with hydrogen fluoride solution, CLC is carried out in air without substrate heating, followed by the preparation of transistor islands using reactive ion etching (RIE). A 50-nm-thick SiO₂ film is deposited by plasma enhanced chemical vapor deposition (PECVD), followed by heat treatment in nitrogen atmosphere at 550 °C for 4 h and deposition of Mo film as the top gate. Next, P or BF₂ is ion-implanted into poly-Si_1-xGe_x for source-drain (SD) respectively, at 10 keV and 3×10¹⁵ cm^-2. After ion implantation is completed, interlayer dielectric SiO₂ film is deposited by PECVD and activated by heating in nitrogen atmosphere at 550 °C for 6 h. Subsequently, contact holes and Mo electrodes are formed. Finally, hydrogenation using step-cooling is performed to complete the TFT. N-channel (n-ch) and P-channel (p-ch) poly-Si TFTs are also fabricated using identical processes. Two types of TFTs were fabricated for both poly-Si_1-xGe_x TFTs and poly-Si TFTs: one with the G.B. lying parallel to the SD direction (parallel type) and the other with the G.B. perpendicular to the SD direction (perpendicular type).

The transfer characteristics of n-ch TFTs showed that the threshold voltages (V_th) of poly-Si_1-xGe_x shifted in the positive direction in comparison with those of poly-Si TFTs. The mobility and sub-threshold swing (s.s.) values of poly-Si_1-xGe_x were inferior to those of poly-Si TFTs, for both the parallel and perpendicular types.

Considering the p-ch TFTs, the transfer characteristics of parallel poly-Si_1-xGe_x TFTs showed higher OFF current and lower ON current than the corresponding poly-Si TFTs. In case of perpendicular types, OFF currents of poly-Si_1-xGe_x TFTs were comparable with that of poly-Si TFTs and ON currents of poly-Si_1-xGe_x TFTs were lower than those of poly-Si TFTs. Moreover, V_th values of poly-Si_1-xGe_x TFTs were shifted in the positive direction in comparison to those of poly-Si TFTs, for both parallel and perpendicular types.

The segregation coefficient of Ge in Si is less than 1.0, and it has been shown that Ge segregates to G.B.s in poly-Si_1-xGe_x thin films during solidification. As acceptors are generated in regions with high Ge concentration along G.B.s, p-type quasi-one-dimensional conduction regions were formed in Si_1-xGe_x along G.B.s. Therefore, when SD regions are parallel to a G.B., a current path connecting those regions is formed along G.B.s in p-type poly-Si_1-xGe_x TFTs, leading to enhancement of OFF current. However, when G.B.s lie perpendicular to SD regions, the latter remain unconnected, leading to normal OFF current values.

The positive shift in V_th of poly-Si_1-xGe_x TFTs can be explained by the formation of acceptors. It can also be concluded that the decrease of ON current in poly-Si_1-xGe_x TFTs is due to ionized impurity scattering by the acceptors. In addition, the difference in the magnitude of ON current depending on the G.B. direction can be explained as follows: when G.B.s are parallel to the SD direction, ON current is higher than that of the perpendicular type, because G.B.s do not act as strong scattering centers.

In summary, the characteristics of CLC poly-Si_1-xGe_x TFTs can be explained by the formation of acceptors. In particular, the large OFF current in parallel p-ch poly-Si_1-xGe_x TFTs is explained by Ge segregation along G.B.s, resulting in formation of quasi-one-dimensional p-type conduction channels and electrical connection between SD region.