In this lecture semiconductor advanced packaging is defined. The kinds of advanced packaging are ranked based on their interconnect density and electrical performance and are grouped into 2D, 2.1D, 2.3D, 2.5D, and 3D IC integration, which will be presented and discussed. Key enabling technologies such as flip chip and fan-out will be briefly mentioned. The trends and challenges (opportunities) of advanced packaging will be discussed. Also, in this lecture, chiplet design and heterogeneous integration packaging are defined. The chiplet design and heterogeneous integration packaging such as those given by Xilinx, AMD, Intel, TSMC, and Samsung will be presented and discussed. The lateral communication between chiplets such as the silicon bridges embedded in organic build-up package substrate (Intel’s EMIB and IBM’s DBHi) and fan-out epoxy molding compound (Applied Materials’ chip-first face-up, Unimicron’s chip-first face-down, TSMC’s LSI, SPIL’s FO-EB, ASE’s sFOCoS, IME’s EFI, and Amkor’s S-Connect Fan-Out Interposer) as well as flexible bridges will be presented. Key enabling technologies such as thermocompression bonding and hybrid bonding will be briefly mentioned. The trends and challenges (opportunities) of chiplet design and heterogeneous integration packaging will be discussed.