G03 - Stacked Nanosheet Devices

Tuesday, 11 October 2022: 10:30-12:10
Room 212 (The Hilton Atlanta)
Chairs:
Atsushi Ogura and Xiao Gong
10:30
Compressive Strained Si1-XGex Channel for High Performance Gate-All-Around Nanosheet Transistors
S. Mochizuki, J. Li, E. Stuckert (IBM Research), H. Zhou, and N. Loubet (IBM)
11:00
Stacked Nanosheet FETs and Beyond
C. Liu, C. T. Tu, B. W. Huang, and C. Y. Cheng (National Taiwan University)
11:30
Selective Sige Vapor Etching Using Br2 in View of Nanosheet Devices with Bottom Isolation
R. Loo (imec), N. Gosset, M. Isaji, Y. Kawamura (Air Liquide Laboratories), A. Y. Hikavyy, E. Rosseel, C. Porret, A. Nalin Mehta (imec), and J. M. Girard (Air Liquide Advanced Materials)
11:50
Design of Experiment for Optimal Sige Selectivity in Cavity Etching Process for Gate-All-Around Structure Formation
Z. Li, X. Ke, J. Song, F. Li, S. Ji, and H. Zhang (Semiconductor Manufacturing International Corporation)