Thin film technologies, particularly thin-film transistors, have been the backbone of large-area electronics for decades, primarily for display applications such as flat panel displays. These devices were mainly manufactured on glass substrate. The processes have therefore been considered as a low temperature technology compared to bulk silicon CMOS technology processes. However, due to the huge development of integrated electronics in parallel driven by a steady size reduction to cope with Moore’s law, the CMOS thermal budget has been drastically lowered, which in-fine brought both technologies to comparable processing temperatures. Today, flexible plastics is used as a substrate. In addition, as the physical limitation of dimensions becomes close to the size of one monolayer, integration has shifted to the third dimension by stacking circuit substrates and other physical or electrical functions (more than Moore). As a result, electrical circuits become three-dimensional and increasingly involve thin-film technologies in new systems-on-a-chip (SOC) or systems-in-package (SiP).

This trend allows creating new objects that are gathering several functions with communication capabilities, i.e. connected smart objects. The connected objects can contain sensors, actuators, signal processing circuits but also displays, energy harvesting device. In other words, they combine large area electronics and CMOS ones. The main advantage of the thin film technologies is also offering the possibilities to process multidisciplinary objects such as MEMS (micro-electrical-mechanical systems), BioMEMS for biological application, Optoelectronic systems, for example. The spectrum of combination is increasingly wider and hence addresses a large field of applications to many societal issues such as health, environment, security, transport, energy, communications, etc.

The research activities for the development of thin film transistors technologies is mature even if progress still remain to reduce the power consumption and/or to improve the electrical characteristics, the sensitivity and the reliability. Important research efforts were devoted to improve the quality of the semiconductor materials, to adapt the thin layer deposition techniques to the nature of the substrate, to improve the interfaces at the border of the active zones, to minimize the density of defects despite a low temperature budget by involving several techniques of crystallization and/or depositions, by and also changing the architecture of the elementary device, and the design of the circuits, ….

A large variety of skills has to be made available in order to keep the pace of this technology development. This means the training of skilled technicians, engineers, and researchers bearing PhD degrees. In a context of digital society, developing the skills of the graduate students is strongly linked to the knowledge and the associated know-how. The initial education of engineers and researchers must contain several practical training based on the outcome of research activity allowing an awareness of the students to the new challenge.

Practical training to develop advanced know-how skills might be hindered by the cost of the equipment and the associated running expenses. To meet this challenge, the French CNFM (National coordination for Education in Microelectronics and Nanotechnologies) network strategy is sharing the fabrication facilities such as the cleanroom and the design tools. In this strategy, twelve microelectronics centers were created in the early 80’s, seven of them having cleanrooms opened to initial education, and lifelong learning. Today, these centers are organized in a network, recognized by the Ministry of Higher Education that financially supports at least partially, the common activities. In this network two important industrial partners are members of the CNFM BoD.

Several CNFM centers have activities in the thin film technologies, mainly Rennes, Grenoble, Lille and Bordeaux centers. They have developed practicals for students that include amorphous and polycrystalline silicon thin film transistors technologies, and more recently organic semiconductors for photovoltaic and optoelectronics applications, graphene thin film devices, or insulator ultrathin films for memories (such as Metal-Insulator-Metal or MIM), but also sensors and actuators involving suspended gate thin film transistors, suspended membranes, nanowires or cantilevers, piezoelectric films, etc.

After a presentation of the evolution of the thin film technologies thanks to the research activities, and of the societal issues for applications that include the development of connected objects, the presentation highlights the set-up of training covering the different aspects of the thin film technologies in order to train the graduate students for the future digital and connected society. This transfer from the research activities towards the Higher Education is the main mission of the University world.