The carbon vacancy (V_C) is a major point defect in high-purity 4H-SiC epitaxial layers for bipolar power devices, and it limits the minority charge carrier lifetime. V_C exhibits a formation energy of only ~5.0 eV, as confirmed both theoretically and experimentally, and in as-grown layers realized by chemical vapor deposition techniques, the V_C concentration is typically in the low 10¹² cm^-3 range. After high-temperature device processing exceeding 1900 °C, the V_C concentration can be enhanced by several orders of magnitude.

Three different approaches are commonly used to minimize the V_C content and enhance the carrier lifetime; (i) near-surface ion implantation followed by high-temperature annealing, (ii) thermal oxidation of the Si-terminated epi-layer surface, and the most recent one (iii) ‘equilibrium annealing’ at moderate temperatures (≤1500 °C) under C-rich surface conditions. In the present contribution, we will discuss the advantages and limitations of the different approaches with a particular focus on the approach (iii). New insight into the atomistic processes governing the V_C equilibration kinetics is given and how these processes can be tailored by varying the cooling rate after high-temperature treatment. Especially, the diffusivities of both V_C and the carbon self-interstitial are found to play a decisive role and where at least the former one displays a substantial anisotropy between directions parallel and perpendicular to the basal c-plane. After thermal treatment of as-grown layers under C-rich surface conditions at 1500 °C for 1 h followed by slow/moderate cooling, the V_C concentration is shown to be reduced to ~1x10¹¹ cm^-3 enabling a minority carrier lifetime well above 20 µs at room temperature.