Resistive Memory

Tuesday, October 29, 2013: 10:20-12:20
Union Square 22, Tower 3, 4th Floor (Hilton San Francisco Union Square)
Chairs:
Rainer Waser, Prof. and Daniele Ielmini, PhD
10:20
2157
(Invited) Resistive Switching in Metal Oxides: From Physical Modeling to Device Scaling
Daniele Ielmini, PhD, Politecnico di Milano; Stefano Ambrogio, Politecnico di Milano; Simone Balatti, Politecnico di Milano
10:50
2158
(Invited) Optimization of WAl2O3Cu(-Te) Material Stack for High-Performance Conductive-Bridging Memory Cells
Ludovic Goux, IMEC; Woosik Kim, IMEC; Karl Opsomer, IMEC; Attilio Belmonte, IMEC; G. S. Kar, IMEC; F. De Stefano, KU Leuven; Valery V. Afanas'ev, University of Leuven; U. Celano, KU Leuven; Michel Houssa, University of Leuven; W. Devulder, University of Gent; C. Detavernier, University of Gent; R. Muller, IMEC; W. Vandervorst, KU Leuven; Malgorzata Jurczak, imec
11:20
2159
(Invited) Theoretical Design of Desirable Stack Structure for Resistive Random Access Memories
Katsumasa Kamiya, University of Tsukuba; Moon Young Yang, University of Tsukuba; Blanka Magyari-Köpe, Stanford University; Masaaki Niwa, Tohoku University; Yoshio Nishi, Stanford University; Kenji Shiraishi, Nagoya University
11:50
2160
(Invited) The Role of Electrochemical Interfaces in ReRAM Memory Cells
Ilia Valov, Electronic Materials; Stefan Tappertzhofen, Institut fuer Werkstoffe der Elektrotechnik II; Eike Linn, Institut fuer Werkstoffe der Elektrotechnik II; Rainer Waser, Prof., Electronic Materials
See more of: E10: Semiconductors, Dielectrics, and Metals for Nanoelectronics 11
See more of: Dielectric and Semiconductor Materials, Devices, and Processing
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