E10 Semiconductors, Dielectrics, and Metals for Nanoelectronics 11
Lead Organizer:
Samares Kar (Infian Institute of Technology, Kanpur)
Co-organizers:
Michel Houssa (University of Leuven)
,
Hemanth Jagannathan (IBM Research)
,
K. Kita (The University of Tokyo)
,
D. Landheer (National Research Council Canada)
,
Durga Misra, Ph.D. (New Jersey Institute of Technology)
and
S. Van Elshocht (imec)
Monday, October 28, 2013
08:00-11:40
11:40-12:10
14:00-16:40
Nanowire Technology
Union Square 22, Tower 3, 4th Floor
Chair(s): Uri Banin, Ph.D. and Sanjay K Banerjee
Tuesday, October 29, 2013
09:10-10:20
Ge and SiGe Channels
Union Square 22, Tower 3, 4th Floor
Chair(s): Shadi Dayeh, PhD and Michel Houssa
10:20-12:20
Resistive Memory
Union Square 22, Tower 3, 4th Floor
Chair(s): Rainer Waser, Prof. and Daniele Ielmini, PhD
14:00-17:00
2D Semiconductors
Union Square 22, Tower 3, 4th Floor
Chair(s): Massimo V Fischetti, PhD and Ali Javey
18:00-20:00
E10 Poster Session
Grand Ballroom, Tower 2, Grand Ballroom Level
Chair(s): Hemanth Jagannathan and Samares Kar
Wednesday, October 30, 2013
09:00-10:50
10:50-11:50
Novel Transistors
Union Square 22, Tower 3, 4th Floor
Chair(s): Kaustav Banerjee, PhD and Hemanth Jagannathan
13:40-15:30
Characterization
Union Square 22, Tower 3, 4th Floor
Chair(s): Valery V. Afanas'ev and Koji Kita, PhD
15:40-17:00
InGaAs Channels
Union Square 22, Tower 3, 4th Floor
Chair(s): Alessandro Molle, PhD and Samares Kar
