Defects, Traps, and Reliability

Monday, October 28, 2013: 08:00-11:40
Union Square 22, Tower 3, 4th Floor (Hilton San Francisco Union Square)
Chairs:
Moshe Eizenberg , Durga Misra, Ph.D. and Samares Kar
08:00
Welcoming Remarks
08:10
Effects of N-Rich TiN Capping Layer on Reliability in Gate-Last High-k/Metal Gate MOSFETs
Kidan Bae, Samsung Electronics Co.; Kyung Taek Lee, Samsung Electronics Co.; Hyun Chul Sagong, Samsung Electronics Co.; Minhyeok Choe, Samsung Electronics Co.; Hyunwoo Lee, Samsung Electronics Co.; Sungeun Kim, Samsung Electronics Co.; Kwang-Soo Kim, Samsung Semiconductor Institute of Technology; Junekyun Park, Samsung Electronics Co.; Sangwoo Pae, Samsung Electronics Co.; Jongwoo Park, Samsung Electronics Co.
08:30
High Temperature Annealing of the Interface State Component of Negative-Bias Temperature Instability (NBTI) in MOSFET Devices
Duc Nguyen, COSMIAC; Kenneth Kambour, SAIC; Camron Kouhestani, COSMIAC; Harold P. Hjalmarson, Sandia National Laboratories; Roderick A.B. Devine, Think-Strategically
08:50
Reliability of ALD Hf1-XZrxO2 Deposited by Intermediate Annealing or Intermediate Plasma Treatment
Mdnasiruddin Bhuyian, New Jersey Institute of Technology; Durga Misra, Ph.D., New Jersey Institute of Technology; Kandabara Tapily, TEL Technology Center, America; Robert Clark, TEL Technology Center, America; Steve Consiglio, TEL Technology Center, America; Cory Wajda, TEL Technology Center, America; G. Nakamura, TEL Technology Center, America; Gert Leusink, TEL Technology Center, America
09:10
(Invited) Multiphonon Processes as the Origin of Reliability Issues
Wolfgang Goes, Institute for Microelectronics; Maria Toledano-Luque, imec; Franz Schanovsky, Institute for Microelectronics; Markus Bina, Institute for Microelectronics; Oskar Baumgartner, Institute for Microelectronics; Ben Kaczer, imec; Tibor Grasser, Institute for Microelectronics
09:40
Break
10:00
Similarities between Ionizing Radiation Effects and Negative-Bias Temperature Instability (NBTI) in MOSFET Devices
Harold P. Hjalmarson, Sandia National Laboratories; Duc Nguyen, COSMIAC; Kenneth Kambour, SAIC; Camron Kouhestani, COSMIAC; Roderick A.B. Devine, Think-Strategically
10:20
(Invited) SiC MOS Interface States: Difference between Si Face and C Face
Takahide Umeda, University of Tsukuba; Mitsuo Okamoto, National Institute of Advanced Industrial Science and Technology; Ryouji Kosugi, National Institute of Advanced Industrial Science and Technology; Shinsuke Harada, National Institute of Advanced Industrial Science and Technology; Ryo Arai, University of Tsukuba; Yoshihiro Sato, University of Tsukuba; Takahiro Makino, Japan Atomic Energy Agency; Takeshi Ohshima, Japan Atomic Energy Agency
10:50
Reliability of La-Silicate MOS Capacitors with Tungsten Carbide Gate Electrode for Scaled EOT
Shuhei Hosoda, Tokyo Institute of Technology; Kamale Tuokedaerhan, Tokyo Institute of Technology; Kuniyuki Kakushima, Tokyo Institute of Technology; Yoshinori Kataoka, Tokyo Institute of Technology; Akira Nishiyama, Tokyo Institute of Technology; Nobuyuki Sugii, Tokyo Institute of Technology; Hitoshi Wakabayashi, Tokyo Institute of Technology; Kazuo Tsutsui, Tokyo Institute of Technology; Kenji Natori, Tokyo Institute of Technology; Hiroshi Iwai, Tokyo Institute of Technology
11:10
(Invited) Origins for Fermi Level Control in Metal/High-k/Si Stacks with Inserted Dielectric Layers
Moshe Eizenberg, Technion - Israel Institute of Technology; Lior Kornblum, Technion - Israel Institute of Technology